Stall decode after an instruction with stores until the stores are done.

1 files changed, 26 insertions, 1 deletions

diff --git a/isa/isa.h b/isa/isa.h
index 4083e16..f94a117 100644
--- a/isa/isa.h
+++ b/isa/isa.h
@@ -57,6 +57,9 @@ static std::string opr_disasm_group2_neg[0366];
 static std::string opr_disasm_extended_arith[0376];
 
 struct instruction_context {
+    // Known statically before decode time
+    unsigned int bits;
+
     // Known statically at decode time
     bool need_indirect_load = false;    // final_address = mem[init_address]
     bool need_autoinc_store = false;    // mem[init_address] += 1
@@ -79,7 +82,6 @@ struct instruction_context {
     void execute() { ef(*this); }
 
     // May change over the lifetime of the instruction execution
-    unsigned int bits;
     unsigned int next_pc;                       // includes IF
     std::optional<unsigned int> init_address;   // includes DF
     std::optional<unsigned int> final_address;  // includes DF
@@ -88,6 +90,29 @@ struct instruction_context {
     std::optional<unsigned int> acc;
     std::optional<bool> link;
     std::optional<unsigned int> mq;
+
+    // N.B. two "identical" instructions may compare unequal if they are at different points in their execution
+    bool operator==(const instruction_context &that) const {
+        if (bits != that.bits)
+            return false;
+        if (init_address != that.init_address)
+            return false;
+        if (final_address != that.final_address)
+            return false;
+        if (ctlval != that.ctlval)
+            return false;
+        if (data != that.data)
+            return false;
+        if (acc != that.acc)
+            return false;
+        if (link != that.link)
+            return false;
+        if (mq != that.mq)
+            return false;
+        if (next_pc != that.next_pc)
+            return false;
+        return true;
+    }
 };
 
 void init_disasm_tables();