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-rw-r--r--io/model.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/io/model.cpp b/io/model.cpp
index eaa6ca8..e1b59ea 100644
--- a/io/model.cpp
+++ b/io/model.cpp
@@ -16,21 +16,21 @@ bool iomodel::interact(std::array<unsigned int, NUM_CTLREGS> &ctlregs) {
16 16
17 ++time; 17 ++time;
18 18
19 if (ctlregs[TT_OUTPUT] & 0x100) { 19 if (ctlregs[TT_BITS] & TTO_TX) {
20 // PDP-8 doesn't really have support for 8-bit output, this is Jules' contribution 20 // PDP-8 doesn't really have support for 8-bit output, this is Jules' contribution
21 std::cout << (char)((ctlregs[TT_OUTPUT] & 0xff) ^ 0x80) << std::flush; 21 std::cout << (char)(((ctlregs[TT_BITS] & TTO_DATA) >> TTO_DATA_SHIFT) ^ 0x80) << std::flush;
22 ctlregs[TT_OUTPUT] &= ~0x1ff; 22 ctlregs[TT_BITS] &= ~TTO_TX & ~TTO_DATA;
23 log.emplace(time + TT_OUTPUT_DELAY, event(TT_OUTPUT, 0x200, 0)); 23 log.emplace(time + TT_OUTPUT_DELAY, event(TT_BITS, TTO_FLAG, 0));
24 } 24 }
25 25
26 bool interrupt = false; 26 bool interrupt = false;
27 if (ctlregs[INT_ENABLE] & 1) { 27 if (ctlregs[INT_ENABLE] & 1) {
28 if (ctlregs[TT_INPUT_INT_ENABLE]) { 28 if (ctlregs[TT_INPUT_INT_ENABLE]) {
29 if (ctlregs[TT_INPUT] & 0x100) 29 if (ctlregs[TT_BITS] & TTI_FLAG)
30 interrupt = true; 30 interrupt = true;
31 } 31 }
32 if (ctlregs[TT_OUTPUT_INT_ENABLE]) { 32 if (ctlregs[TT_OUTPUT_INT_ENABLE]) {
33 if (!(ctlregs[TT_OUTPUT] & 0x400) && (ctlregs[TT_OUTPUT] & 0x200)) 33 if ((ctlregs[TT_BITS] & (TTO_FLAG|TTO_FLAG_OLD)) == TTO_FLAG)
34 interrupt = true; 34 interrupt = true;
35 } 35 }
36 } 36 }
@@ -40,7 +40,7 @@ bool iomodel::interact(std::array<unsigned int, NUM_CTLREGS> &ctlregs) {
40 ctlregs[DATA_INSTRUCTION_FIELD_BUFFER] = 0; 40 ctlregs[DATA_INSTRUCTION_FIELD_BUFFER] = 0;
41 ctlregs[HALTED] = 0; 41 ctlregs[HALTED] = 0;
42 ctlregs[INT_ENABLE] = 0; 42 ctlregs[INT_ENABLE] = 0;
43 ctlregs[TT_OUTPUT] = (ctlregs[TT_OUTPUT] & 0x200) * 3; 43 ctlregs[TT_BITS] |= (ctlregs[TT_BITS] & TTO_FLAG) ? TTO_FLAG_OLD : 0;
44 } else { 44 } else {
45 ctlregs[INT_ENABLE] = (ctlregs[INT_ENABLE] >> 1) * 3; 45 ctlregs[INT_ENABLE] = (ctlregs[INT_ENABLE] >> 1) * 3;
46 } 46 }