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-rw-r--r--isa/isa.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/isa/isa.h b/isa/isa.h
index 11a8db2..bea484e 100644
--- a/isa/isa.h
+++ b/isa/isa.h
@@ -3,19 +3,20 @@
3#include <functional> 3#include <functional>
4#include <optional> 4#include <optional>
5 5
6#include "infra/pipetrace.h"
7
8enum ctlreg { 6enum ctlreg {
9 DATA_INSTRUCTION_FIELD_BUFFER, // (df << 3) | if_buffer 7 DATA_INSTRUCTION_FIELD_BUFFER, // (df << 3) | if_buffer
10 DATA_INSTRUCTION_FIELD_SAVED, // (df_saved << 3) | if_saved 8 DATA_INSTRUCTION_FIELD_SAVED, // (df_saved << 3) | if_saved
9 HALTED,
11 INT_ENABLE, // (int_enable_delay << 1) | int_enable 10 INT_ENABLE, // (int_enable_delay << 1) | int_enable
11 TT_INPUT, // (tti_flag << 8) | tti_buffer
12 TT_INPUT_INT_ENABLE,
13 TT_OUTPUT, // {tto_flag_old, tto_flag, tto_tx, tto_data}
14 TT_OUTPUT_INT_ENABLE,
12 15
13 NUM_CTLREGS, 16 NUM_CTLREGS,
14}; 17};
15 18
16struct instruction_context { 19struct instruction_context {
17 infra::transaction transaction;
18
19 // Known statically at decode time 20 // Known statically at decode time
20 bool need_indirect_load = false; // final_address = mem[init_address] 21 bool need_indirect_load = false; // final_address = mem[init_address]
21 bool need_autoinc_store = false; // mem[init_address] += 1 22 bool need_autoinc_store = false; // mem[init_address] += 1
@@ -43,7 +44,6 @@ struct instruction_context {
43 std::optional<unsigned int> acc; 44 std::optional<unsigned int> acc;
44 std::optional<bool> link; 45 std::optional<bool> link;
45 std::optional<unsigned int> mq; 46 std::optional<unsigned int> mq;
46 bool halt = false;
47}; 47};
48 48
49instruction_context decode(unsigned int df, unsigned int pc, unsigned int bits); 49instruction_context decode(unsigned int df, unsigned int pc, unsigned int bits, bool interrupt);