diff options
Diffstat (limited to '')
| -rw-r--r-- | isa/decode.cpp | 66 | ||||
| -rw-r--r-- | isa/isa.h | 1 |
2 files changed, 67 insertions, 0 deletions
diff --git a/isa/decode.cpp b/isa/decode.cpp index 1ecb189..d709cf8 100644 --- a/isa/decode.cpp +++ b/isa/decode.cpp | |||
| @@ -73,6 +73,72 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit | |||
| 73 | break; | 73 | break; |
| 74 | case 6: // IOT | 74 | case 6: // IOT |
| 75 | switch ((bits >> 3) & 077) { | 75 | switch ((bits >> 3) & 077) { |
| 76 | case 000: | ||
| 77 | // INTERRUPT CONTROLLER | ||
| 78 | switch (bits & 07) { | ||
| 79 | case 0: | ||
| 80 | // SKON skip if interrupts enabled | ||
| 81 | inst.read_ctlreg = INT_ENABLE; | ||
| 82 | inst.possibly_redirects = true; | ||
| 83 | inst.ef = [](auto &ctx) { | ||
| 84 | if (ctx.ctlval.value() & 1) | ||
| 85 | ctx.next_pc = (ctx.next_pc & 07777) | ((ctx.next_pc + 1) & 07777); | ||
| 86 | }; | ||
| 87 | break; | ||
| 88 | case 1: | ||
| 89 | // ION set int_enable_delay | ||
| 90 | inst.read_ctlreg = INT_ENABLE; | ||
| 91 | inst.write_ctlreg = INT_ENABLE; | ||
| 92 | inst.ef = [](auto &ctx) { | ||
| 93 | ctx.ctlval.value() |= 2; | ||
| 94 | }; | ||
| 95 | break; | ||
| 96 | case 2: | ||
| 97 | // IOFF clear int_enable and int_enable_delay | ||
| 98 | inst.write_ctlreg = INT_ENABLE; | ||
| 99 | inst.ef = [](auto &ctx) { | ||
| 100 | ctx.ctlval = 0; | ||
| 101 | }; | ||
| 102 | break; | ||
| 103 | case 3: | ||
| 104 | // SRQ skip if pending interrupt | ||
| 105 | inst.read_ctlreg = INT_PENDING; | ||
| 106 | inst.possibly_redirects = true; | ||
| 107 | inst.ef = [](auto &ctx) { | ||
| 108 | if (ctx.ctlval.value()) | ||
| 109 | ctx.next_pc = (ctx.next_pc & 07777) | ((ctx.next_pc + 1) & 07777); | ||
| 110 | }; | ||
| 111 | break; | ||
| 112 | case 4: | ||
| 113 | // GTF get flags | ||
| 114 | inst.ef = [](auto &ctx) { | ||
| 115 | assert(false); | ||
| 116 | }; | ||
| 117 | break; | ||
| 118 | case 5: | ||
| 119 | // RTF restore flags | ||
| 120 | inst.ef = [](auto &ctx) { | ||
| 121 | assert(false); | ||
| 122 | }; | ||
| 123 | break; | ||
| 124 | case 6: | ||
| 125 | // SGT skip if greater than | ||
| 126 | inst.ef = [](auto &ctx) { | ||
| 127 | assert(false); | ||
| 128 | }; | ||
| 129 | break; | ||
| 130 | case 7: | ||
| 131 | // CAF clear all flags | ||
| 132 | inst.ef = [](auto &ctx) { | ||
| 133 | assert(false); | ||
| 134 | }; | ||
| 135 | break; | ||
| 136 | default: | ||
| 137 | inst.ef = [](auto &ctx) { | ||
| 138 | assert(false); | ||
| 139 | }; | ||
| 140 | } | ||
| 141 | break; | ||
| 76 | case 004: | 142 | case 004: |
| 77 | // TELETYPE TELEPRINTER/PUNCH | 143 | // TELETYPE TELEPRINTER/PUNCH |
| 78 | switch (bits & 07) { | 144 | switch (bits & 07) { |
| @@ -8,6 +8,7 @@ enum ctlreg { | |||
| 8 | DATA_INSTRUCTION_FIELD_SAVED, // (df_saved << 3) | if_saved | 8 | DATA_INSTRUCTION_FIELD_SAVED, // (df_saved << 3) | if_saved |
| 9 | HALTED, | 9 | HALTED, |
| 10 | INT_ENABLE, // (int_enable_delay << 1) | int_enable | 10 | INT_ENABLE, // (int_enable_delay << 1) | int_enable |
| 11 | INT_PENDING, // only meaningful if interrupts disabled | ||
| 11 | TT_BITS, // see below TT[IO]_* consts | 12 | TT_BITS, // see below TT[IO]_* consts |
| 12 | TT_INPUT_INT_ENABLE, | 13 | TT_INPUT_INT_ENABLE, |
| 13 | TT_OUTPUT_INT_ENABLE, | 14 | TT_OUTPUT_INT_ENABLE, |
