diff options
Diffstat (limited to 'isa')
| -rw-r--r-- | isa/decode.cpp | 6 | ||||
| -rw-r--r-- | isa/isa.h | 27 |
2 files changed, 29 insertions, 4 deletions
diff --git a/isa/decode.cpp b/isa/decode.cpp index f0cdca8..abcb3e3 100644 --- a/isa/decode.cpp +++ b/isa/decode.cpp | |||
| @@ -88,15 +88,15 @@ instruction_context decode(std::uint_fast32_t flags, unsigned int pc, unsigned i | |||
| 88 | #pragma GCC diagnostic pop | 88 | #pragma GCC diagnostic pop |
| 89 | 89 | ||
| 90 | instruction_context inst; | 90 | instruction_context inst; |
| 91 | inst.bits = bits; | ||
| 92 | inst.next_pc = (pc & ~07777) | ((pc + 1) & 07777); | ||
| 93 | |||
| 94 | if (interrupt) { | 91 | if (interrupt) { |
| 95 | inst.bits = bits = 04000; | 92 | inst.bits = bits = 04000; |
| 96 | assert(df == 0); | 93 | assert(df == 0); |
| 97 | assert(ifb == 0); | 94 | assert(ifb == 0); |
| 98 | inst.next_pc = pc; | 95 | inst.next_pc = pc; |
| 99 | pc = 0; | 96 | pc = 0; |
| 97 | } else { | ||
| 98 | inst.bits = bits; | ||
| 99 | inst.next_pc = (pc & ~07777) | ((pc + 1) & 07777); | ||
| 100 | } | 100 | } |
| 101 | 101 | ||
| 102 | switch (bits >> 9) { | 102 | switch (bits >> 9) { |
| @@ -57,6 +57,9 @@ static std::string opr_disasm_group2_neg[0366]; | |||
| 57 | static std::string opr_disasm_extended_arith[0376]; | 57 | static std::string opr_disasm_extended_arith[0376]; |
| 58 | 58 | ||
| 59 | struct instruction_context { | 59 | struct instruction_context { |
| 60 | // Known statically before decode time | ||
| 61 | unsigned int bits; | ||
| 62 | |||
| 60 | // Known statically at decode time | 63 | // Known statically at decode time |
| 61 | bool need_indirect_load = false; // final_address = mem[init_address] | 64 | bool need_indirect_load = false; // final_address = mem[init_address] |
| 62 | bool need_autoinc_store = false; // mem[init_address] += 1 | 65 | bool need_autoinc_store = false; // mem[init_address] += 1 |
| @@ -79,7 +82,6 @@ struct instruction_context { | |||
| 79 | void execute() { ef(*this); } | 82 | void execute() { ef(*this); } |
| 80 | 83 | ||
| 81 | // May change over the lifetime of the instruction execution | 84 | // May change over the lifetime of the instruction execution |
| 82 | unsigned int bits; | ||
| 83 | unsigned int next_pc; // includes IF | 85 | unsigned int next_pc; // includes IF |
| 84 | std::optional<unsigned int> init_address; // includes DF | 86 | std::optional<unsigned int> init_address; // includes DF |
| 85 | std::optional<unsigned int> final_address; // includes DF | 87 | std::optional<unsigned int> final_address; // includes DF |
| @@ -88,6 +90,29 @@ struct instruction_context { | |||
| 88 | std::optional<unsigned int> acc; | 90 | std::optional<unsigned int> acc; |
| 89 | std::optional<bool> link; | 91 | std::optional<bool> link; |
| 90 | std::optional<unsigned int> mq; | 92 | std::optional<unsigned int> mq; |
| 93 | |||
| 94 | // N.B. two "identical" instructions may compare unequal if they are at different points in their execution | ||
| 95 | bool operator==(const instruction_context &that) const { | ||
| 96 | if (bits != that.bits) | ||
| 97 | return false; | ||
| 98 | if (init_address != that.init_address) | ||
| 99 | return false; | ||
| 100 | if (final_address != that.final_address) | ||
| 101 | return false; | ||
| 102 | if (ctlval != that.ctlval) | ||
| 103 | return false; | ||
| 104 | if (data != that.data) | ||
| 105 | return false; | ||
| 106 | if (acc != that.acc) | ||
| 107 | return false; | ||
| 108 | if (link != that.link) | ||
| 109 | return false; | ||
| 110 | if (mq != that.mq) | ||
| 111 | return false; | ||
| 112 | if (next_pc != that.next_pc) | ||
| 113 | return false; | ||
| 114 | return true; | ||
| 115 | } | ||
| 91 | }; | 116 | }; |
| 92 | 117 | ||
| 93 | void init_disasm_tables(); | 118 | void init_disasm_tables(); |
