diff options
Diffstat (limited to 'isa')
| -rw-r--r-- | isa/checker.cpp | 4 | ||||
| -rw-r--r-- | isa/checker.h | 1 | ||||
| -rw-r--r-- | isa/decode.cpp | 19 | ||||
| -rw-r--r-- | isa/isa.h | 3 |
4 files changed, 27 insertions, 0 deletions
diff --git a/isa/checker.cpp b/isa/checker.cpp index 05b59a9..1919bd1 100644 --- a/isa/checker.cpp +++ b/isa/checker.cpp | |||
| @@ -28,6 +28,8 @@ void checker::execute() { | |||
| 28 | inst.acc = acc; | 28 | inst.acc = acc; |
| 29 | if (inst.need_read_link) | 29 | if (inst.need_read_link) |
| 30 | inst.link = link; | 30 | inst.link = link; |
| 31 | if (inst.need_read_mq) | ||
| 32 | inst.mq = mq; | ||
| 31 | if (inst.read_ctlreg.has_value()) | 33 | if (inst.read_ctlreg.has_value()) |
| 32 | inst.ctlval = ctlregs[*inst.read_ctlreg]; | 34 | inst.ctlval = ctlregs[*inst.read_ctlreg]; |
| 33 | inst.execute(); | 35 | inst.execute(); |
| @@ -35,6 +37,8 @@ void checker::execute() { | |||
| 35 | acc = inst.acc.value(); | 37 | acc = inst.acc.value(); |
| 36 | if (inst.need_write_link) | 38 | if (inst.need_write_link) |
| 37 | link = inst.link.value(); | 39 | link = inst.link.value(); |
| 40 | if (inst.need_write_mq) | ||
| 41 | mq = inst.mq.value(); | ||
| 38 | if (inst.write_ctlreg.has_value()) | 42 | if (inst.write_ctlreg.has_value()) |
| 39 | ctlregs[*inst.write_ctlreg] = inst.ctlval.value(); | 43 | ctlregs[*inst.write_ctlreg] = inst.ctlval.value(); |
| 40 | if (inst.need_exec_store) | 44 | if (inst.need_exec_store) |
diff --git a/isa/checker.h b/isa/checker.h index 1ea572b..d70997f 100644 --- a/isa/checker.h +++ b/isa/checker.h | |||
| @@ -38,6 +38,7 @@ struct funcmem { | |||
| 38 | struct checker { | 38 | struct checker { |
| 39 | unsigned int acc = 0; | 39 | unsigned int acc = 0; |
| 40 | unsigned int link = 0; | 40 | unsigned int link = 0; |
| 41 | unsigned int mq = 0; | ||
| 41 | unsigned int pc = 00200; | 42 | unsigned int pc = 00200; |
| 42 | std::array<unsigned int, NUM_CTLREGS> ctlregs; | 43 | std::array<unsigned int, NUM_CTLREGS> ctlregs; |
| 43 | instruction_context inst; | 44 | instruction_context inst; |
diff --git a/isa/decode.cpp b/isa/decode.cpp index 1d46375..1979982 100644 --- a/isa/decode.cpp +++ b/isa/decode.cpp | |||
| @@ -155,6 +155,25 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit | |||
| 155 | if (skip) | 155 | if (skip) |
| 156 | ctx.next_pc = (ctx.next_pc & 070000) | ((ctx.next_pc + 1) & 007777); | 156 | ctx.next_pc = (ctx.next_pc & 070000) | ((ctx.next_pc + 1) & 007777); |
| 157 | }; | 157 | }; |
| 158 | } else if ((bits & 0401) == 0401) { | ||
| 159 | bool cla = bits & 0200; | ||
| 160 | bool mqa = bits & 0100; | ||
| 161 | bool mql = bits & 0020; | ||
| 162 | bool extended_arith = bits & 0056; | ||
| 163 | inst.need_read_acc = mqa || mql; | ||
| 164 | inst.need_read_mq = mqa; | ||
| 165 | inst.need_write_acc = cla || mqa; | ||
| 166 | inst.need_write_mq = mql; | ||
| 167 | inst.ef = [cla, mqa, mql, extended_arith](auto &ctx) { | ||
| 168 | assert(!extended_arith); | ||
| 169 | if (cla) ctx.acc = 0; | ||
| 170 | auto new_acc = ctx.acc; | ||
| 171 | auto new_mq = ctx.mq; | ||
| 172 | if (mqa) new_acc = ctx.acc.value() | ctx.mq.value(); | ||
| 173 | if (mql) new_mq = ctx.acc.value(); | ||
| 174 | ctx.acc = new_acc; | ||
| 175 | ctx.mq = new_mq; | ||
| 176 | }; | ||
| 158 | } else { | 177 | } else { |
| 159 | assert(false); | 178 | assert(false); |
| 160 | } | 179 | } |
| @@ -22,9 +22,11 @@ struct instruction_context { | |||
| 22 | bool need_exec_load = false; // data = mem[final_address] | 22 | bool need_exec_load = false; // data = mem[final_address] |
| 23 | bool need_read_acc = false; // acc = %acc | 23 | bool need_read_acc = false; // acc = %acc |
| 24 | bool need_read_link = false; // link = %link | 24 | bool need_read_link = false; // link = %link |
| 25 | bool need_read_mq = false; // mq = %mq | ||
| 25 | std::optional<ctlreg> read_ctlreg; // ctlval = %[read_ctlreg] | 26 | std::optional<ctlreg> read_ctlreg; // ctlval = %[read_ctlreg] |
| 26 | bool need_write_acc = false; // %acc = acc | 27 | bool need_write_acc = false; // %acc = acc |
| 27 | bool need_write_link = false; // %link = link | 28 | bool need_write_link = false; // %link = link |
| 29 | bool need_write_mq = false; // %mq = mq | ||
| 28 | std::optional<ctlreg> write_ctlreg; // %[write_ctlreg] = ctlval | 30 | std::optional<ctlreg> write_ctlreg; // %[write_ctlreg] = ctlval |
| 29 | bool need_exec_store = false; // mem[final_address] = data | 31 | bool need_exec_store = false; // mem[final_address] = data |
| 30 | bool possibly_redirects = false; // %pc = next_pc | 32 | bool possibly_redirects = false; // %pc = next_pc |
| @@ -40,6 +42,7 @@ struct instruction_context { | |||
| 40 | std::optional<unsigned int> data; | 42 | std::optional<unsigned int> data; |
| 41 | std::optional<unsigned int> acc; | 43 | std::optional<unsigned int> acc; |
| 42 | std::optional<bool> link; | 44 | std::optional<bool> link; |
| 45 | std::optional<unsigned int> mq; | ||
| 43 | bool halt = false; | 46 | bool halt = false; |
| 44 | }; | 47 | }; |
| 45 | 48 | ||
