summaryrefslogtreecommitdiff
path: root/uarch/core.h
diff options
context:
space:
mode:
Diffstat (limited to 'uarch/core.h')
-rw-r--r--uarch/core.h74
1 files changed, 74 insertions, 0 deletions
diff --git a/uarch/core.h b/uarch/core.h
new file mode 100644
index 0000000..0f9be74
--- /dev/null
+++ b/uarch/core.h
@@ -0,0 +1,74 @@
1#pragma once
2
3#include <array>
4
5#include "infra/pipetrace.h"
6#include "infra/port.h"
7#include "io/model.h"
8#include "isa/checker.h"
9#include "isa/isa.h"
10
11struct core;
12
13struct fetch_bundle {
14 infra::transaction tr;
15 unsigned int gen;
16 unsigned int pc;
17 unsigned int word;
18};
19
20struct fetch_restart {
21 infra::transaction tr;
22 unsigned int new_gen;
23 unsigned int new_pc;
24};
25
26struct fetch_stage : public infra::sim {
27 core &c;
28
29 unsigned int gen = 0;
30 unsigned int pc;
31 bool didrestart = false;
32
33 fetch_stage(core &c);
34
35 void clock();
36};
37
38struct decode_stage : public infra::sim {
39 core &c;
40
41 unsigned int gen = 0;
42
43 bool interrupt = false;
44
45 unsigned int acc;
46 unsigned int link;
47 unsigned int mq;
48 unsigned int pc;
49 std::array<uint_fast32_t, NUM_CTLREGS> ctlregs;
50 std::uint64_t icount;
51 instruction_context inst;
52
53 decode_stage(core &c);
54
55 void clock();
56};
57
58struct core {
59 iomodel &system;
60 funcchecker checker;
61 funcmem mem;
62
63 infra::port<fetch_bundle> fetch_bundlep;
64 std::optional<fetch_restart> fetch_restarto;
65
66 // Construction order is execution order within a cycle, so this list should be back-to-front (for zero-cycle restarts)
67 decode_stage decode{*this};
68 fetch_stage fetch{*this};
69
70 core(iomodel &model)
71 : system(model)
72 , checker(model)
73 { }
74};