From 2c13075cb50aaba5a6af0185b8f520347a8ab4b4 Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Fri, 7 Oct 2022 19:24:27 -0700
Subject: Minor cleanup and some compilation fixes.

---
 .gitignore      |  1 +
 isa/checker.cpp | 13 +++++++------
 isa/checker.h   | 20 ++++++++++++++++++++
 isa/decode.cpp  |  2 +-
 isa/isa.h       |  4 +++-
 5 files changed, 32 insertions(+), 8 deletions(-)
 create mode 100644 .gitignore
 create mode 100644 isa/checker.h

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..796b96d
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1 @@
+/build
diff --git a/isa/checker.cpp b/isa/checker.cpp
index cd802a8..604279a 100644
--- a/isa/checker.cpp
+++ b/isa/checker.cpp
@@ -1,15 +1,16 @@
 #include <cassert>
 
+#include "isa/checker.h"
 #include "isa/isa.h"
 
 void checker::execute() {
-    assert(!halt);
-    auto int_enable_delay = ctlregs[ctlreg::INT_ENABLE] >> 1;
-    if (ctlregs[ctlreg::INT_ENABLE] & 1) {
+    assert(!halted);
+    auto int_enable_delay = ctlregs[INT_ENABLE] >> 1;
+    if (ctlregs[INT_ENABLE] & 1) {
         // check for interrupt
     }
-    ctlregs[ctlreg::INT_ENABLE] = (int_enable_delay << 1) | int_enable_delay;
-    inst = decode(ctlregs[ctlreg::DATA_INSTRUCTION_FIELD_BUFFER],
+    ctlregs[INT_ENABLE] = (int_enable_delay << 1) | int_enable_delay;
+    auto inst = decode(ctlregs[DATA_INSTRUCTION_FIELD_BUFFER],
                   pc,
                   mem.fetch(pc));
     auto next_pc = inst.next_pc;
@@ -40,5 +41,5 @@ void checker::execute() {
         mem.store(inst.final_address.value(), inst.data.value());
     assert(inst.next_pc == next_pc || inst.possibly_redirects);
     pc = inst.next_pc;
-    halt = inst.halt;
+    halted = inst.halt;
 }
diff --git a/isa/checker.h b/isa/checker.h
new file mode 100644
index 0000000..6aae3ff
--- /dev/null
+++ b/isa/checker.h
@@ -0,0 +1,20 @@
+#pragma once
+
+#include <array>
+
+#include "isa/isa.h"
+
+struct funcmem {
+    unsigned int fetch(unsigned int address);
+    void store(unsigned int address, unsigned int value);
+};
+
+struct checker {
+    unsigned int acc = 0;
+    unsigned int link = 0;
+    unsigned int pc = 0;
+    std::array<unsigned int, NUM_CTLREGS> ctlregs;
+    bool halted = false;
+    funcmem mem;
+    void execute();
+};
diff --git a/isa/decode.cpp b/isa/decode.cpp
index 8a85d41..5212ae7 100644
--- a/isa/decode.cpp
+++ b/isa/decode.cpp
@@ -79,7 +79,7 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit
 
     // Instructions with memory operands may be direct or indirect
     if (inst.need_exec_load || inst.need_exec_store || inst.possibly_redirects) {
-        auto addr = (df << 12) | ((bits & 00200) ? (next_pc & 07600) : 0) | (bits & 00177);
+        auto addr = (df << 12) | ((bits & 00200) ? (inst.next_pc & 07600) : 0) | (bits & 00177);
         if (bits & 00400) {
             inst.need_indirect_load = true;
             inst.init_address = addr;
diff --git a/isa/isa.h b/isa/isa.h
index 3effb5b..3b8220e 100644
--- a/isa/isa.h
+++ b/isa/isa.h
@@ -5,10 +5,12 @@
 
 #include "infra/pipetrace.h"
 
-enum class ctlreg {
+enum ctlreg {
     DATA_INSTRUCTION_FIELD_BUFFER,  // (df << 3) | if_buffer
     DATA_INSTRUCTION_FIELD_SAVED,   // (df_saved << 3) | if_saved
     INT_ENABLE,                     // (int_enable_delay << 1) | int_enable
+
+    NUM_CTLREGS,
 };
 
 struct instruction_context {
-- 
cgit v1.2.3