From 27a58c86ce494588a12023a12b027b7f44bb35fc Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Sun, 15 Jan 2023 14:02:54 -0800
Subject: Stall decode after an instruction with stores until the stores are
 done.

---
 isa/decode.cpp |  6 +++---
 isa/isa.h      | 27 ++++++++++++++++++++++++++-
 2 files changed, 29 insertions(+), 4 deletions(-)

(limited to 'isa')

diff --git a/isa/decode.cpp b/isa/decode.cpp
index f0cdca8..abcb3e3 100644
--- a/isa/decode.cpp
+++ b/isa/decode.cpp
@@ -88,15 +88,15 @@ instruction_context decode(std::uint_fast32_t flags, unsigned int pc, unsigned i
 #pragma GCC diagnostic pop
 
     instruction_context inst;
-    inst.bits = bits;
-    inst.next_pc = (pc & ~07777) | ((pc + 1) & 07777);
-
     if (interrupt) {
         inst.bits = bits = 04000;
         assert(df == 0);
         assert(ifb == 0);
         inst.next_pc = pc;
         pc = 0;
+    } else {
+        inst.bits = bits;
+        inst.next_pc = (pc & ~07777) | ((pc + 1) & 07777);
     }
 
     switch (bits >> 9) {
diff --git a/isa/isa.h b/isa/isa.h
index 4083e16..f94a117 100644
--- a/isa/isa.h
+++ b/isa/isa.h
@@ -57,6 +57,9 @@ static std::string opr_disasm_group2_neg[0366];
 static std::string opr_disasm_extended_arith[0376];
 
 struct instruction_context {
+    // Known statically before decode time
+    unsigned int bits;
+
     // Known statically at decode time
     bool need_indirect_load = false;    // final_address = mem[init_address]
     bool need_autoinc_store = false;    // mem[init_address] += 1
@@ -79,7 +82,6 @@ struct instruction_context {
     void execute() { ef(*this); }
 
     // May change over the lifetime of the instruction execution
-    unsigned int bits;
     unsigned int next_pc;                       // includes IF
     std::optional<unsigned int> init_address;   // includes DF
     std::optional<unsigned int> final_address;  // includes DF
@@ -88,6 +90,29 @@ struct instruction_context {
     std::optional<unsigned int> acc;
     std::optional<bool> link;
     std::optional<unsigned int> mq;
+
+    // N.B. two "identical" instructions may compare unequal if they are at different points in their execution
+    bool operator==(const instruction_context &that) const {
+        if (bits != that.bits)
+            return false;
+        if (init_address != that.init_address)
+            return false;
+        if (final_address != that.final_address)
+            return false;
+        if (ctlval != that.ctlval)
+            return false;
+        if (data != that.data)
+            return false;
+        if (acc != that.acc)
+            return false;
+        if (link != that.link)
+            return false;
+        if (mq != that.mq)
+            return false;
+        if (next_pc != that.next_pc)
+            return false;
+        return true;
+    }
 };
 
 void init_disasm_tables();
-- 
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