From d97b32ac6a2ccca3704f567b12ab0378dc7e8dac Mon Sep 17 00:00:00 2001 From: Julian Blake Kongslie Date: Sun, 16 Oct 2022 17:19:25 -0700 Subject: Nearly-working version of TTY output --- isa/decode.cpp | 76 +++++++++++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 68 insertions(+), 8 deletions(-) (limited to 'isa') diff --git a/isa/decode.cpp b/isa/decode.cpp index d24632b..cb6a694 100644 --- a/isa/decode.cpp +++ b/isa/decode.cpp @@ -23,7 +23,7 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit inst.need_read_acc = true; inst.need_write_acc = true; inst.ef = [](auto &ctx) { - ctx.acc = ctx.acc.value() & ctx.data.value(); + ctx.acc = ctx.acc.value() & ctx.data.value() & 07777; }; break; case 1: // TAD @@ -44,7 +44,7 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit inst.possibly_redirects = true; inst.ef = [](auto &ctx) { ctx.data = (ctx.data.value() + 1) & 07777; - if (*ctx.data) + if (*ctx.data == 0) ctx.next_pc = (ctx.next_pc & ~07777) | ((ctx.next_pc + 1) & 07777); }; break; @@ -72,9 +72,69 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit }; break; case 6: // IOT - inst.ef = [](auto &ctx) { - assert(false); - }; + switch ((bits >> 3) & 077) { + case 004: + switch (bits & 07) { + case 0: + inst.write_ctlreg = TT_OUTPUT; + inst.ef = [](auto &ctx) { + ctx.ctlval = 0x600; + }; + break; + case 1: + inst.read_ctlreg = TT_OUTPUT; + inst.possibly_redirects = true; + inst.ef = [](auto &ctx) { + if (ctx.ctlval.value() & 0x200) + ctx.next_pc = (ctx.next_pc & ~07777) | ((ctx.next_pc + 1) & 07777); + }; + break; + case 2: + inst.write_ctlreg = TT_OUTPUT; + inst.ef = [](auto &ctx) { + ctx.ctlval = 0; + }; + break; + case 4: + inst.need_read_acc = true; + inst.read_ctlreg = TT_OUTPUT; + inst.write_ctlreg = TT_OUTPUT; + inst.ef = [](auto &ctx) { + auto &x = ctx.ctlval.value(); + x &= ~0x1ff; + x |= (ctx.acc.value() & 0xff) ^ 0x80; // 0x7f instead of 0xff for real PDP-8 IO + x |= 0x100; + }; + break; + case 5: + inst.possibly_redirects = true; + // FIXME this instruction wants to read both TT_OUTPUT and TT_INPUT + inst.ef = [](auto &ctx) { + assert(false); + }; + break; + case 6: + inst.need_read_acc = true; + inst.read_ctlreg = TT_OUTPUT; + inst.write_ctlreg = TT_OUTPUT; + inst.ef = [](auto &ctx) { + auto &x = ctx.ctlval.value(); + x &= ~0x7ff; + x |= (ctx.acc.value() & 0xff) ^ 0x80; + x |= 0x100; + }; + break; + default: + inst.ef = [](auto &ctx) { + assert(false); + }; + } + break; + default: + inst.ef = [](auto &ctx) { + assert(false); + }; + } break; case 7: // OPR if ((bits & 0400) == 0000) { @@ -93,7 +153,7 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit inst.ef = [cla, cll, cma, cml, rar, ral, bsw, iac](auto &ctx) { if (cla) ctx.acc = 0; if (cll) ctx.link = 0; - if (cma) ctx.acc = ~ctx.acc.value(); + if (cma) ctx.acc = ~ctx.acc.value() & 07777; if (cml) ctx.link = !ctx.link.value(); if (iac) { if (++ctx.acc.value() == 0) ctx.link = !ctx.link.value(); @@ -139,7 +199,7 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit assert(!osr); if (hlt) ctx.ctlval = 1; if (skip) - ctx.next_pc = (ctx.next_pc & 070000) | ((ctx.next_pc + 1) & 007777); + ctx.next_pc = (ctx.next_pc & ~07777) | ((ctx.next_pc + 1) & 07777); }; } else if ((bits & 0411) == 0410) { bool cla = bits & 0200; @@ -163,7 +223,7 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit assert(!osr); if (hlt) ctx.ctlval = 1; if (skip) - ctx.next_pc = (ctx.next_pc & 070000) | ((ctx.next_pc + 1) & 007777); + ctx.next_pc = (ctx.next_pc & ~07777) | ((ctx.next_pc + 1) & 07777); }; } else if ((bits & 0401) == 0401) { bool cla = bits & 0200; -- cgit v1.2.3