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#pragma once
#include <cstdint>
#include <functional>
#include <optional>
enum ctlreg {
DATA_INSTRUCTION_FIELD_BUFFER, // (df << 3) | if_buffer
DATA_INSTRUCTION_FIELD_SAVED, // (df_saved << 3) | if_saved
HALTED,
INT_ENABLE, // (int_enable_delay << 1) | int_enable
INT_PENDING, // only meaningful if interrupts disabled
TT_BITS, // see below TT[IO]_* consts
TT_INPUT_INT_ENABLE,
TT_OUTPUT_INT_ENABLE,
NUM_CTLREGS,
};
// TT_BITS
static constexpr unsigned int TTI_FLAG = 1 << 0;
static constexpr unsigned int TTO_TX = 1 << 1;
static constexpr unsigned int TTO_FLAG = 1 << 2;
static constexpr unsigned int TTO_FLAG_OLD = 1 << 3;
static constexpr unsigned int TTI_DATA_SHIFT = 8;
static constexpr unsigned int TTO_DATA_SHIFT = 16;
static constexpr unsigned int TTI_DATA = 0xff << TTI_DATA_SHIFT;
static constexpr unsigned int TTO_DATA = 0xff << TTO_DATA_SHIFT;
struct instruction_context {
// Known statically at decode time
bool need_indirect_load = false; // final_address = mem[init_address]
bool need_autoinc_store = false; // mem[init_address] += 1
bool need_exec_load = false; // data = mem[final_address]
bool need_read_acc = false; // acc = %acc
bool need_read_link = false; // link = %link
bool need_read_mq = false; // mq = %mq
std::optional<ctlreg> read_ctlreg; // ctlval = %[read_ctlreg]
bool need_write_acc = false; // %acc = acc
bool need_write_link = false; // %link = link
bool need_write_mq = false; // %mq = mq
std::optional<ctlreg> write_ctlreg; // %[write_ctlreg] = ctlval
bool need_exec_store = false; // mem[final_address] = data
bool possibly_redirects = false; // %pc = next_pc
std::function<void(instruction_context &ctx)> ef;
void execute() { ef(*this); }
// May change over the lifetime of the instruction execution
unsigned int next_pc; // includes IF
std::optional<unsigned int> init_address; // includes DF
std::optional<unsigned int> final_address; // includes DF
std::optional<std::uint_fast32_t> ctlval; // control registers may be larger than 16 bits (e.g. TT_BITS)
std::optional<unsigned int> data;
std::optional<unsigned int> acc;
std::optional<bool> link;
std::optional<unsigned int> mq;
};
instruction_context decode(unsigned int df, unsigned int pc, unsigned int bits, bool interrupt);
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