From 765420c81d144bb08021a7aa09a9a0692f5d6322 Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Fri, 16 Jul 2021 13:22:51 -0700
Subject: Add counter module and simplify board design for shift instructions.

---
 sim/top.sv | 1 +
 1 file changed, 1 insertion(+)

(limited to 'sim/top.sv')

diff --git a/sim/top.sv b/sim/top.sv
index 6773739..464b93d 100644
--- a/sim/top.sv
+++ b/sim/top.sv
@@ -14,6 +14,7 @@ bit [BUS_BITS-1:0] dbus;
 
 alu     #("../out/alu.bin",     UIP_BITS, UROM_BITS, BUS_BITS) alu(clk, reset, uip, abus, dbus);
 control #("../out/control.bin", UIP_BITS, UROM_BITS, BUS_BITS, "../out/consts.0.bin", "../out/consts.1.bin", 'h7ff8) control(clk, reset, uip, abus, dbus);
+counter #("../out/counter.bin", UIP_BITS, UROM_BITS, BUS_BITS) counter(clk, reset, uip, abus, dbus);
 decode  #("../out/decode.bin",  UIP_BITS, UROM_BITS, BUS_BITS, 12) decode(clk, reset, uip, abus, dbus);
 memory  #("../out/memory.bin",  UIP_BITS, UROM_BITS, BUS_BITS, "../out/image.hex", MEM_BITS) memory(clk, reset, uip, abus, dbus);
 pc      #("../out/pc.bin",      UIP_BITS, UROM_BITS, BUS_BITS, 0) pc(clk, reset, uip, abus, dbus);
-- 
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