diff options
| author | Julian Blake Kongslie | 2022-07-02 13:45:09 -0700 |
|---|---|---|
| committer | Julian Blake Kongslie | 2022-07-02 13:45:09 -0700 |
| commit | c72951a36d6cb9775dc1ecd9bc26bc13e796f10c (patch) | |
| tree | 5a8fe196beba5c7c674d1b3d627c9a0beac849f5 /uarch/memory.h | |
| parent | Trivial code reorg. (diff) | |
| download | issim-c72951a36d6cb9775dc1ecd9bc26bc13e796f10c.tar.xz | |
Dropping the async interface, and adding some real uarch.
Diffstat (limited to '')
| -rw-r--r-- | uarch/memory.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/uarch/memory.h b/uarch/memory.h new file mode 100644 index 0000000..f36e375 --- /dev/null +++ b/uarch/memory.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | #pragma once | ||
| 2 | |||
| 3 | #include <initializer_list> | ||
| 4 | |||
| 5 | #include "aisa/simple-models.h" | ||
| 6 | #include "sim/sim.h" | ||
| 7 | #include "sim/queue.h" | ||
| 8 | #include "uarch/types.h" | ||
| 9 | |||
| 10 | namespace uarch { | ||
| 11 | |||
| 12 | struct MemStage : public sim::Schedulable, aisa::PagedMem<> { | ||
| 13 | sim::Queue<FillReq> &fillreqq; | ||
| 14 | sim::Queue<Store> &storeq; | ||
| 15 | |||
| 16 | MemStage(sim::Scheduler &scheduler, sim::Queue<FillReq> &fillreqq, const std::initializer_list<sim::Queue<Fill> *> &fillqs, sim::Queue<Store> &storeq); | ||
| 17 | |||
| 18 | void clock() override; | ||
| 19 | }; | ||
| 20 | |||
| 21 | } | ||
