From c72951a36d6cb9775dc1ecd9bc26bc13e796f10c Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Sat, 2 Jul 2022 13:45:09 -0700
Subject: Dropping the async interface, and adding some real uarch.

---
 main.cpp | 116 ++++++++++++---------------------------------------------------
 1 file changed, 22 insertions(+), 94 deletions(-)

(limited to 'main.cpp')

diff --git a/main.cpp b/main.cpp
index edb0d56..358b954 100644
--- a/main.cpp
+++ b/main.cpp
@@ -1,113 +1,41 @@
-#include <fmt/core.h>
 #include <iostream>
-#include <memory>
-#include <optional>
 #include <utility>
 
-#include "aisa/aisa.h"
-#include "aisa/async.h"
-#include "aisa/simple-models.h"
 #include "fib/fib.h"
 #include "git-tag.h"
-
-const unsigned int max_steps = 300;
-const bool show_mem_fetch = false;
-const bool show_mem_store = true;
-const bool show_regs = false;
-const bool show_steps = false;
-const bool show_tasks = false;
+#include "sim/sim.h"
+#include "sim/queue.h"
+#include "uarch/exec.h"
+#include "uarch/fetch.h"
+#include "uarch/memory.h"
+#include "uarch/types.h"
 
 int main(int argc, const char *argv[])
 {
     std::cout << "Version " << GIT_TAG << "\n";
 
-    struct Eval : public aisa::AsyncEval<Eval>, aisa::PagedMem<>, aisa::TaskStack, aisa::VectorRF {
-        bool fetch_mem(aisa::byte_t *bytes, aisa::addr_t addr, aisa::addr_t size)
-        {
-            if (aisa::PagedMem<>::fetch_mem(bytes, addr, size)) {
-                if (show_mem_fetch) {
-                    fmt::print("\t\t\t");
-                    for (; size; --size)
-                        fmt::print("{:02x} ", *bytes++);
-                    fmt::print("= [{:x}]\n", addr);
-                }
-                return true;
-            }
-            return false;
-        }
-
-        bool store_mem(aisa::addr_t addr, const aisa::byte_t *bytes, aisa::addr_t size)
-        {
-            if (aisa::PagedMem<>::store_mem(addr, bytes, size)) {
-                if (show_mem_store) {
-                    fmt::print("\t\t\t[{:x}] =", addr);
-                    for (; size; --size)
-                        fmt::print(" {:02x}", *bytes++);
-                    fmt::print("\n");
-                }
-                return true;
-            }
-            return false;
-        }
-
-        bool store_reg(aisa::regnum_t rn, aisa::regval_t rv)
-        {
-            if (aisa::VectorRF::store_reg(rn, rv)) {
-                if (show_regs)
-                    fmt::print(".{} = {}\n", fib::Reg::disasm(rn), rv);
-                return true;
-            }
-            return false;
-        }
-
-        bool push_task(std::unique_ptr<const aisa::Task> &&task)
-        {
-            auto d = task->disasm();
-            if (aisa::TaskStack::push_task(std::move(task))) {
-                if (show_tasks)
-                    fmt::print("\t\t*** ENTER {} ***\n", d);
-                return true;
-            }
-            return false;
-        }
+    fib::Fib<3> fib;
 
-        bool pop_task()
-        {
-            if (aisa::TaskStack::pop_task()) {
-                if (show_tasks)
-                    fmt::print("\t\t *** LEAVE ***\n");
-                return true;
-            }
-            return false;
-        }
-    } eval;
+    sim::Scheduler sched;
 
-    fib::Fib<3> fib;
+    sim::Queue<uarch::FillReq> fillreqq(sched, 1);
+    sim::Queue<uarch::Fill> fillfetchq(sched, 0);
+    sim::Queue<uarch::Fill> fillexecq(sched, 0);
+    sim::Queue<uarch::Store> storeq(sched, 1);
+    sim::Queue<uarch::Uop> execq(sched, 0);
 
-    if (!eval.async_setup_initial_task(fib)()) {
-        fmt::print("Failed to complete initial setup.\n");
-        return 1;
-    }
+    auto fetch = new uarch::FetchStage(sched, fib, fillreqq, fillfetchq, execq);
+    auto exec = new uarch::ExecStage(sched, execq, fillreqq, fillexecq, storeq);
+    auto mem = new uarch::MemStage(sched, fillreqq, {&fillfetchq, &fillexecq}, storeq);
 
-    for (unsigned int i = 0; i < max_steps; ++i) {
-        auto res = eval.async_fetch_and_run_step()();
-        if (res.has_value()) {
-            auto &es = *res;
-            if (es.first) {
-                auto &step = *es.first;
-                auto &w = es.second;
-                if (show_steps)
-                    fmt::print("\t{}\n", step.disasm(&w));
-            } else {
-                break;
-            }
-        } else {
-            fmt::print("Failed to complete step.\n");
-            return 2;
-        }
+    while (true) {
+        std::cout << "\n*** cycle " << sched.now << "\n\n";
+        sched.clock();
     }
 
-    fmt::print("Functional model exited.\n");
+    delete fetch;
+    delete exec;
+    delete mem;
 
     return 0;
 }
-- 
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