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| author | Julian Blake Kongslie | 2022-03-20 17:27:41 -0700 |
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| committer | Julian Blake Kongslie | 2022-03-20 17:27:41 -0700 |
| commit | 3a65ecf1581148b0c09e85c58019d017e78f1857 (patch) | |
| tree | 951f531e8f095d73e6b65ab31853a70b3ba85a0f /altera/clocks.sdc | |
| parent | Cleanup of PDP-8 core to support arbitrated memory protocol. (diff) | |
| download | multipdp8-3a65ecf1581148b0c09e85c58019d017e78f1857.tar.xz | |
Run ~*EIGHT GODDAMN PDP-8s IN PARALLEL*~
It looks like we could probably fit 16 on the current FPGA, just about.
(doesn't meet timing at 50MHz, should in theory work at 40MHz)
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