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| author | Julian Blake Kongslie | 2022-05-15 15:53:36 -0700 |
|---|---|---|
| committer | Julian Blake Kongslie | 2022-05-15 15:53:36 -0700 |
| commit | 716ed41a46aea2a3c81564b6e6a55e3b3e43ec46 (patch) | |
| tree | 6d8aed132fc842ed12495d0401bab5b2911e10ad /tcl | |
| parent | Change to 1Mbaud RS232 (diff) | |
| download | multipdp8-716ed41a46aea2a3c81564b6e6a55e3b3e43ec46.tar.xz | |
Fix the RS232 receive state machine 😠💢:mad:
Our current consensus is that we have a bug which causes the RX state
machine to make incomprehensible jumps when the sample counter is more
than about 9 bits wide. We haven't completely pinned down the problem;
we saw it when running at 1Mbaud with a 7 bit (one extra bit) counter.
I hate Verilog and Altera, both exclusively and in combination.
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