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-rw-r--r--tcl/init.tcl1
1 files changed, 1 insertions, 0 deletions
diff --git a/tcl/init.tcl b/tcl/init.tcl
index 9c94592..4e4660d 100644
--- a/tcl/init.tcl
+++ b/tcl/init.tcl
@@ -5,6 +5,7 @@ set_global_assignment -name DEVICE 10CL025YU256I7G
5set_global_assignment -name TOP_LEVEL_ENTITY top 5set_global_assignment -name TOP_LEVEL_ENTITY top
6set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005 6set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
7set_global_assignment -name VERILOG_MACRO "SYNTHESIS=1" 7set_global_assignment -name VERILOG_MACRO "SYNTHESIS=1"
8#set_global_assignment -name VERILOG_MACRO "NO_L1_CACHE=1"
8set_global_assignment -name NUM_PARALLEL_PROCESSORS 1 9set_global_assignment -name NUM_PARALLEL_PROCESSORS 1
9set_global_assignment -name ENABLE_SIGNALTAP OFF 10set_global_assignment -name ENABLE_SIGNALTAP OFF
10 11