From 5743c10d698c87cd379af7276fb435dedd11c4cc Mon Sep 17 00:00:00 2001 From: Julian Blake Kongslie Date: Fri, 18 Mar 2022 09:21:35 -0700 Subject: Redraw the diagram in PLAN to make it a little prettier. --- PLAN | 73 +++++++++++++++++++++++++++++++++++++++++++++----------------------- 1 file changed, 48 insertions(+), 25 deletions(-) diff --git a/PLAN b/PLAN index a4e4691..80701cd 100644 --- a/PLAN +++ b/PLAN @@ -1,31 +1,54 @@ 1. fix hello.pal (in noncpu) 2. fix hello.pal (in multipdp8) (it only sees bytes with the lowest bit set) - +-----------+ - +-----| Arbiter 1 |<--------------------------------------------+ - | +-----------+ | - | ^ | - v | | -+--------+ +----------------+ +----------------+ +----------------+ -| UART 0 |-->| Command Parser |-----+ | Off-chip DRAM | | Result Printer | -+--------+ +----------------+ | +----------------+ +----------------+ - | ^ | ^ - | | v | -+--------+ +-------+ | +----------------+ | -| UART 1 |-->| PDP-8 | v | RAM Controller | | -+--------+ +-------+ +-----------+ +----------------+ +-------------+ - | Cache |--------->| Arbiter 2 |-->| Another Cache |-->| Broadcaster | - +-------+ +-----------+ +----------------+ +-------------+ - ^ | - | | - +-------------------------------------------------------------+ - - Arbiter 1: Trivial priority arbiter - Arbiter 2: Adds clog2(1 + number of PDP-8s) tag bits indicating which channel was selected - For inputs coming from a PDP-8 as opposed to the command parser, add the appropriate prefix to the memory address - Broadcaster: Removes clog2(1 + number of PDP-8s) tag bits to determine which channel to send to - For outputs going to a PDP-8 as opposed to the result printer, strip excess address bits - + Command block: + + +--------------+ +----------------+ + +-----| Echo Arbiter |<--| Result Printer |<-------------------------------+ + | +--------------+ +----------------+ | + | ^ | + v | | ++--------+ +----------------+ | +| UART 0 |-->| Command Parser |------------+ RAM block: | ++--------+ +----------------+ | | + | +----------------+ | + | | Off-chip DRAM | | + | +----------------+ | + PDP-8 block: | ^ | | + | | v | ++--------+ +-------+ | +----------------+ | +| UART 1 |<->| PDP-8 | v | RAM Controller | | ++--------+ +-------+ +-------------+ +----------------+ +---------------+ + | Cache |------------------>| Mem Arbiter |-->| Another Cache |-->| Mem Broadcast | + +-------+ +-------------+ +----------------+ +---------------+ + ^ ^ | | + | | | | + +--------------------------------------------------------------+ | + | | + * | | + * (PDP-8s are replicated) | | + * | | + | | ++--------+ +-------+ | | +| UART N |<->| PDP-8 | | | ++--------+ +-------+ | | + | Cache |---------------------+ | + +-------+ | + ^ | + | | + +----------------------------------------------------------------+ + + Echo Arbiter: Trivial priority arbiter (input echo has priority over the result printer) + Nen Arbiter: Adds clog2(1 + number of PDP-8s) tag bits indicating which channel was selected + For inputs coming from a PDP-8 as opposed to the command parser, add the appropriate prefix to the memory address + Mem Broadcast: Removes clog2(1 + number of PDP-8s) tag bits to determine which channel to send to + For outputs going to a PDP-8 as opposed to the result printer, strip excess address bits + +Note that the mem arbiter and broadcast have to be as wide as (number of +PDP-8s)+1, so they will wind up being bottlenecks. The memory protocol allows +arbitrary stalls, so multi-cycle arbitration is possible. + +Not shown is the front panel interface. For the front panel: -- cgit v1.2.3