From b1c127c984338ce44561c74df891597c30070811 Mon Sep 17 00:00:00 2001 From: Julian Blake Kongslie Date: Sun, 13 Mar 2022 16:49:38 -0700 Subject: Change FIFO size for UARTs to 1024 bytes in each direction. --- hdl/core.sv | 4 ++-- hdl/top.sv | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hdl/core.sv b/hdl/core.sv index b8b3e2b..a71e318 100644 --- a/hdl/core.sv +++ b/hdl/core.sv @@ -175,8 +175,8 @@ bit [7:0] tx_data; alt_jtag_atlantic #( .INSTANCE_ID(1) - , .LOG2_RXFIFO_DEPTH(6) - , .LOG2_TXFIFO_DEPTH(6) + , .LOG2_RXFIFO_DEPTH(10) + , .LOG2_TXFIFO_DEPTH(10) , .SLD_AUTO_INSTANCE_INDEX("NO") ) uart ( .clk(clk) diff --git a/hdl/top.sv b/hdl/top.sv index 7ec57b7..5c8b531 100644 --- a/hdl/top.sv +++ b/hdl/top.sv @@ -62,8 +62,8 @@ module top alt_jtag_atlantic #( .INSTANCE_ID(0) - , .LOG2_RXFIFO_DEPTH(6) - , .LOG2_TXFIFO_DEPTH(6) + , .LOG2_RXFIFO_DEPTH(10) + , .LOG2_TXFIFO_DEPTH(10) , .SLD_AUTO_INSTANCE_INDEX("NO") ) ram_jtag ( .clk(internal_clock) -- cgit v1.2.3