From 38c5ae5b60eae9562b97da42f47af3861847f8e5 Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Sun, 8 May 2022 15:51:35 -0700
Subject: *Proper* serial port for memory downloads. 115200 8O2 RS232 with
 CRTRTS.

---
 PLAN | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

(limited to 'PLAN')

diff --git a/PLAN b/PLAN
index a2bfaaa..8b46103 100644
--- a/PLAN
+++ b/PLAN
@@ -1,7 +1,8 @@
-1. more scalable memory arbiter
-2. debug rs232 uart
-3. add cts/rts flow control to rs232 uart
-4. rs232-based high speed memory downloader (nios terminal sucks)
+0. increase speed of rs232 and make the rx side oversample
+1. make rs232 come up in a cleaner state following reset
+2. add cts/rts flow control to rs232 uart
+3. rs232-based high speed memory downloader (nios terminal sucks)
+4. more scalable memory arbiter
 5. add pdp-8 instruction cache
 6. add pdp-8 data cache
 7. add global shared cache
-- 
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