From 38c5ae5b60eae9562b97da42f47af3861847f8e5 Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Sun, 8 May 2022 15:51:35 -0700
Subject: *Proper* serial port for memory downloads. 115200 8O2 RS232 with
 CRTRTS.

---
 hdl/core.sv | 2 --
 1 file changed, 2 deletions(-)

(limited to 'hdl/core.sv')

diff --git a/hdl/core.sv b/hdl/core.sv
index 6827b8e..587ffeb 100644
--- a/hdl/core.sv
+++ b/hdl/core.sv
@@ -3,8 +3,6 @@
 `define DATA_BITS 12
 
 module core
-    #(  JTAG_INSTANCE   = 1
-    )
     (   input   bit clk
     ,   input   bit reset
 
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