`include "defs.svh"

module result_printer
    (   input   bit                 clock
    ,   input   bit                 reset

    ,   output  bit                 result_ready
    ,   input   bit                 result_valid
    ,   input   ram_to_arb_t        result_data

    ,   input   bit         echo_ready
    ,   output  bit         echo_valid
    ,   output  uart_byte_t echo_data

    ,   output  bit loop_ready
    ,   input   bit loop_valid
    ,   input   bit loop_data
    );

    bit                 hold_valid;
    ram_to_arb_t        hold;
    bit                 loop;
    ram_byte_count_t    byte_count;
    ram_word_count_t    word_count;

    (* syn_encoding = "one-hot" *) enum int unsigned
        {   EQUALS_SIGN
        ,   HIGH_NIBBLE
        ,   LOW_NIBBLE
        ,   WORD_SEPARATOR
        } state;

    always @(posedge clock) begin
        if (reset) begin
            result_ready = 0;
            echo_valid = 0;
            echo_data = 0;
            loop_ready = 0;
            hold_valid = 0;
            loop = 0;
            byte_count = 0;
            word_count = 0;
            state = state.first;
        end else begin
            if (echo_ready) echo_valid = 0;
            if (loop_ready && loop_valid)
                loop = loop_data;
            if (result_ready && result_valid) begin
                hold_valid = 1;
                hold = result_data;
                byte_count = `RAM_WORD_BYTES;
                word_count = `RAM_LINE_WORDS;
                state = state.first;
            end

            if (hold_valid && !echo_valid) begin
                if (word_count != 0) begin
                    automatic ram_word_t w = hold.data[word_count-1];
                    automatic ram_byte_t b = w[byte_count-1];
                    echo_valid = 1;
                    if (state == EQUALS_SIGN && !loop)
                        state = state.next;
                    case (state)
                    EQUALS_SIGN: echo_data = "=";
                    HIGH_NIBBLE: echo_data = b[7:4];
                    LOW_NIBBLE: echo_data = b[3:0];
                    WORD_SEPARATOR: echo_data = ":";
                    endcase
                    if (state == HIGH_NIBBLE || state == LOW_NIBBLE) begin
                        if (echo_data < 10)
                            echo_data = echo_data + "0";
                        else
                            echo_data = echo_data + "A" - 10;
                    end
                    if (state == LOW_NIBBLE) begin
                        if (byte_count == 1) begin
                            byte_count = `RAM_WORD_BYTES;
                            word_count = word_count - 1;
                            state = state.next;
                        end else begin
                            byte_count = byte_count - 1;
                            state = HIGH_NIBBLE;
                        end
                    end else begin
                        state = state.next;
                    end
                end else begin
                    echo_valid = 1;
                    if (loop && hold.address[3:0] != 'hf)
                        echo_data = " ";
                    else
                        echo_data = "\n";
                    hold_valid = 0;
                end
            end

            result_ready = !hold_valid;
            loop_ready = 1;
        end
    end

endmodule