summaryrefslogtreecommitdiff
path: root/memory/cache.h
diff options
context:
space:
mode:
authorJulian Blake Kongslie2023-01-22 14:26:47 -0800
committerJulian Blake Kongslie2023-01-22 14:26:47 -0800
commitb5cfa7ef9b83271278da11cf229524324c0b57d0 (patch)
treefdcfa7899aa4418a59f43fa78de29e59e5d5af83 /memory/cache.h
parentShow which event each $horiz row is for at beginning and end of line. (diff)
downloadnanosim-b5cfa7ef9b83271278da11cf229524324c0b57d0.tar.xz
Ignore redundant fill responses in inline_cache.
Diffstat (limited to '')
-rw-r--r--memory/cache.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/memory/cache.h b/memory/cache.h
index 8554910..c7fb602 100644
--- a/memory/cache.h
+++ b/memory/cache.h
@@ -32,7 +32,7 @@ namespace memory {
32 for (unsigned int i = 0; i < WAYS; ++i) { 32 for (unsigned int i = 0; i < WAYS; ++i) {
33 auto &stag = stags[i]; 33 auto &stag = stags[i];
34 if (stag.serial && stag.line_address == r.line_address) { 34 if (stag.serial && stag.line_address == r.line_address) {
35 handle_response(r, stag, sdata[i]); 35 handle_response(r, stag);
36 return; 36 return;
37 } 37 }
38 } 38 }
@@ -48,10 +48,14 @@ namespace memory {
48 handle_response(r, stags[victim], sdata[victim]); 48 handle_response(r, stags[victim], sdata[victim]);
49 } 49 }
50 50
51 void handle_response(const dram::response &r, tag &t, line &d) { 51 void handle_response(const dram::response &r, tag &t) {
52 t.serial = ++last_serial; 52 t.serial = ++last_serial;
53 t.line_address = r.line_address;
54 t.transaction = r.transaction; 53 t.transaction = r.transaction;
54 }
55
56 void handle_response(const dram::response &r, tag &t, line &d) {
57 handle_response(r, t);
58 t.line_address = r.line_address;
55 d = r.data; 59 d = r.data;
56 } 60 }
57 61