noncpu/hdl, branch wip Unnamed repository; edit this file 'description' to name the repository. https://git.jblake.org/noncpu/atom?h=wip 2021-05-30T23:47:19Z Work in progress from May 30 2021-05-30T23:47:19Z Julian Blake Kongslie 2021-05-30T23:47:19Z urn:sha1:fa59c4b8e506e5503caa5b8b4499a3c1965800a5 Work in progress from May 9 2021-05-16T20:40:27Z Julian Blake Kongslie 2021-05-16T20:40:27Z urn:sha1:56eb00d755a3ff2647d635ea9d9ea2e1dd9e15c8 Keyboard input. 2021-05-09T20:53:41Z Julian Blake Kongslie 2021-05-09T20:53:41Z urn:sha1:d677fc5de0568924b39eecae11a24f40566860b9 Add a bunch of microcoded instructions. 2021-05-02T23:58:46Z Julian Blake Kongslie 2021-05-02T23:58:46Z urn:sha1:529c1cc2496e24c6282c3fa9e0a45272b7f500b6 This is a minimum viable PDP-8 that can print "Hello, world!" and halt. Fix a few trivial errors with vector sizes, state names, and syntax. 2021-04-19T01:44:08Z Julian Blake Kongslie 2021-04-19T01:44:08Z urn:sha1:e65524eacc977780ca8716951f02d813fdf841ea PDP-8 memory opcodes 2021-04-19T00:02:12Z Julian Blake Kongslie 2021-04-19T00:02:12Z urn:sha1:e3e1938231ef16ace235f4d958e49913275dcbde Move the core logic out of the top module. 2021-04-18T21:46:30Z Julian Blake Kongslie 2021-04-18T21:46:30Z urn:sha1:b95b2635a4d1c9b9a87588e54995cc5cdaada79f Change synthesis of PLL wrapper to avoid latch logic. 2021-04-15T23:39:58Z Julian Blake Kongslie 2021-04-15T23:39:58Z urn:sha1:abd9703a1b96225db0d7317bf8833467150bae26 Use internal PLL for clock and reset generation. 2021-04-15T01:24:34Z Julian Blake Kongslie 2021-04-14T15:44:31Z urn:sha1:3975a7e26d0ad8c7f33e28e1222d1e09f7bcdb82 Add UART receive opbit. 2021-04-08T00:02:31Z Julian Blake Kongslie 2021-04-08T00:02:31Z urn:sha1:196b67bba9fcb8d8752311f4cf461c82c3d62efb