diff options
| author | Julian Blake Kongslie | 2021-04-07 17:02:31 -0700 |
|---|---|---|
| committer | Julian Blake Kongslie | 2021-04-07 17:02:31 -0700 |
| commit | 196b67bba9fcb8d8752311f4cf461c82c3d62efb (patch) | |
| tree | db3c1a8040ea2b56533b4ea117262d974db4213f | |
| parent | Switch back to $past-based scheduling; my clever idea wasn't clever enough. (diff) | |
| download | noncpu-196b67bba9fcb8d8752311f4cf461c82c3d62efb.tar.xz | |
Add UART receive opbit.
Diffstat (limited to '')
| -rwxr-xr-x | asm.rb | 1 | ||||
| -rw-r--r-- | hdl/top.sv | 12 | ||||
| -rw-r--r-- | mem/jtag_uart.hex | 2 | ||||
| -rw-r--r-- | mem/mem.hex | 27 |
4 files changed, 38 insertions, 4 deletions
| @@ -12,6 +12,7 @@ OPCODES = { | |||
| 12 | "++acc" => 0x002, | 12 | "++acc" => 0x002, |
| 13 | "--acc" => 0x004, | 13 | "--acc" => 0x004, |
| 14 | "tx" => 0x040, | 14 | "tx" => 0x040, |
| 15 | "rx" => 0x080, | ||
| 15 | "halt" => 0x000, | 16 | "halt" => 0x000, |
| 16 | } | 17 | } |
| 17 | 18 | ||
| @@ -118,6 +118,10 @@ always_ff @(posedge clk) begin | |||
| 118 | if (operand[1]) ++acc; | 118 | if (operand[1]) ++acc; |
| 119 | if (operand[2]) --acc; | 119 | if (operand[2]) --acc; |
| 120 | if (operand[6]) state = MEMORY; | 120 | if (operand[6]) state = MEMORY; |
| 121 | if (operand[7]) begin | ||
| 122 | rx_ready = 1; | ||
| 123 | state = MEMORY; | ||
| 124 | end | ||
| 121 | if (operand == 0) state = HALT; | 125 | if (operand == 0) state = HALT; |
| 122 | end | 126 | end |
| 123 | 'h1: acc = sign_extended_operand; | 127 | 'h1: acc = sign_extended_operand; |
| @@ -205,6 +209,14 @@ always_ff @(posedge clk) begin | |||
| 205 | tx_data = acc[7:0]; | 209 | tx_data = acc[7:0]; |
| 206 | end | 210 | end |
| 207 | end | 211 | end |
| 212 | if (operand[7]) begin | ||
| 213 | if (`lag(rx_valid)) begin | ||
| 214 | rx_ready = 0; | ||
| 215 | acc = {{(DATA_BITS-8){1'b0}}, `lag(rx_data)}; | ||
| 216 | end else begin | ||
| 217 | state = MEMORY; | ||
| 218 | end | ||
| 219 | end | ||
| 208 | end | 220 | end |
| 209 | 'h2: begin | 221 | 'h2: begin |
| 210 | if (`lag(mem_read_valid)) begin | 222 | if (`lag(mem_read_valid)) begin |
diff --git a/mem/jtag_uart.hex b/mem/jtag_uart.hex index 7b08c66..efe4169 100644 --- a/mem/jtag_uart.hex +++ b/mem/jtag_uart.hex | |||
| @@ -1,3 +1,5 @@ | |||
| 1 | @0 | 1 | @0 |
| 2 | 2 | ||
| 3 | 48 65 6c 6c 6f 2c 20 46 50 47 41 21 0d 0a | ||
| 4 | |||
| 3 | 00 | 5 | 00 |
diff --git a/mem/mem.hex b/mem/mem.hex index 84caf6d..8619b48 100644 --- a/mem/mem.hex +++ b/mem/mem.hex | |||
| @@ -9,20 +9,32 @@ | |||
| 9 | 000 // fib0: j: 0 # fib[n]; clobbered by ascii printer for inner loop index | 9 | 000 // fib0: j: 0 # fib[n]; clobbered by ascii printer for inner loop index |
| 10 | 000 // fib1: x: 0 # fib[n+1]; clobbered by ascii printer for digit being printed | 10 | 000 // fib1: x: 0 # fib[n+1]; clobbered by ascii printer for digit being printed |
| 11 | 000 // fib2: 0 # fib[n+2] | 11 | 000 // fib2: 0 # fib[n+2] |
| 12 | 116 // start: acc= @fib # for the toy indirect jump to fib | 12 | 116 // start: acc= @echo # for the toy indirect jump to fib |
| 13 | 306 // store @fib0 | 13 | 307 // store @x |
| 14 | 170 // acc= 0x70 | 14 | 170 // acc= 0x70 |
| 15 | 301 // store @i | 15 | 301 // store @i |
| 16 | 001 // loop: cla | 16 | 001 // loop: cla |
| 17 | 281 // ladd i @i | 17 | 281 // ladd i @i |
| 18 | 400 // ifeq 0 | 18 | 400 // ifeq 0 |
| 19 | 586 // jmp i @fib0 # toy indirect jump to fib | 19 | 587 // jmp i @x # toy indirect jump to fib |
| 20 | 040 // tx | 20 | 040 // tx |
| 21 | 003 // cla ++acc | 21 | 003 // cla ++acc |
| 22 | 201 // ladd @i | 22 | 201 // ladd @i |
| 23 | 301 // store @i | 23 | 301 // store @i |
| 24 | 577 // jmp loop | 24 | 577 // jmp loop |
| 25 | 301 // fib: store @i # zero, it is known | 25 | 080 // echo: rx |
| 26 | 40a // ifeq 0x0a | ||
| 27 | 504 // jmp fib | ||
| 28 | 40d // ifeq 0x0d | ||
| 29 | 502 // jmp fib | ||
| 30 | 040 // tx | ||
| 31 | 579 // jmp echo | ||
| 32 | 10d // fib: acc= 0x0d | ||
| 33 | 040 // tx | ||
| 34 | 10a // acc= 0x0a | ||
| 35 | 040 // tx | ||
| 36 | 001 // cla | ||
| 37 | 301 // store @i | ||
| 26 | 370 // store 0x70 # 0x70 is now beginning of Fibonacci sequence (0) | 38 | 370 // store 0x70 # 0x70 is now beginning of Fibonacci sequence (0) |
| 27 | 003 // cla ++acc | 39 | 003 // cla ++acc |
| 28 | 371 // store 0x71 # 0x71 is 1 | 40 | 371 // store 0x71 # 0x71 is 1 |
| @@ -101,6 +113,13 @@ | |||
| 101 | 06c // l | 113 | 06c // l |
| 102 | 064 // d | 114 | 064 // d |
| 103 | 021 // ! | 115 | 021 // ! |
| 116 | 00d // \r | ||
| 104 | 00a // \n | 117 | 00a // \n |
| 118 | 045 // E | ||
| 119 | 063 // c | ||
| 120 | 068 // h | ||
| 121 | 06f // o | ||
| 122 | 03a // : | ||
| 123 | 020 // ' ' | ||
| 105 | 124 | ||
| 106 | 000 | 125 | 000 |
