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authorJulian Blake Kongslie2021-04-05 10:16:58 -0700
committerJulian Blake Kongslie2021-04-05 10:16:58 -0700
commit5d3d64d703fd8c1ef94bd3b67a2e3e43414df604 (patch)
treeb0e2cdc21dbe81230aafc5351e7ddb51e9fa47c1
parentLonger runtime for verilator before giving up. (diff)
downloadnoncpu-5d3d64d703fd8c1ef94bd3b67a2e3e43414df604.tar.xz
Remove some old debug messages.
Diffstat (limited to '')
-rw-r--r--hdl/top.sv12
1 files changed, 1 insertions, 11 deletions
diff --git a/hdl/top.sv b/hdl/top.sv
index 71a5a48..2615db8 100644
--- a/hdl/top.sv
+++ b/hdl/top.sv
@@ -92,12 +92,10 @@ always_ff @(posedge clk) begin
92 acc = 0; 92 acc = 0;
93 state = state.first; 93 state = state.first;
94 end else begin 94 end else begin
95 `ifdef DEBUG $display("s=%0d pc=%x (acc=%x) (mem %b:%x)", state, pc, acc, `mem_read_valid, `mem_read_data); `endif
96 if (`tx_ready) tx_valid = 0; 95 if (`tx_ready) tx_valid = 0;
97 96
98 case (state) 97 case (state)
99 FETCH: begin 98 FETCH: begin
100 `ifdef DEBUG $display("\tfetch"); `endif
101 mem_valid = 1; 99 mem_valid = 1;
102 mem_address = {2'b0, pc}; 100 mem_address = {2'b0, pc};
103 mem_write = 0; 101 mem_write = 0;
@@ -114,7 +112,6 @@ always_ff @(posedge clk) begin
114 state = FETCH; 112 state = FETCH;
115 {opcode, operand} = `mem_read_data; 113 {opcode, operand} = `mem_read_data;
116 sign_extended_operand = {{(DATA_BITS-8){operand[7]}}, operand}; 114 sign_extended_operand = {{(DATA_BITS-8){operand[7]}}, operand};
117 `ifdef DEBUG $display("\tdecode %x:%x", opcode, operand); `endif
118 case (opcode) 115 case (opcode)
119 'h0: begin 116 'h0: begin
120 if (operand[0]) acc = 0; 117 if (operand[0]) acc = 0;
@@ -169,7 +166,6 @@ always_ff @(posedge clk) begin
169 mem_valid = 0; 166 mem_valid = 0;
170 mem_write = 0; 167 mem_write = 0;
171 state = FETCH; 168 state = FETCH;
172 `ifdef DEBUG $display("\tagen"); `endif
173 case (opcode) 169 case (opcode)
174 'h2: begin 170 'h2: begin
175 mem_valid = 1; 171 mem_valid = 1;
@@ -199,7 +195,6 @@ always_ff @(posedge clk) begin
199 mem_write = 0; 195 mem_write = 0;
200 end 196 end
201 state = FETCH; 197 state = FETCH;
202 `ifdef DEBUG $display("\tstall"); `endif
203 case (opcode) 198 case (opcode)
204 'h0: begin 199 'h0: begin
205 if (operand[6]) begin 200 if (operand[6]) begin
@@ -221,13 +216,8 @@ always_ff @(posedge clk) begin
221 endcase 216 endcase
222 end 217 end
223 218
224 HALT: begin 219 HALT: $finish;
225 $display("Reached halt state.");
226 $finish;
227 end
228 endcase 220 endcase
229
230 `ifdef DEBUG if (mem_valid) $display("\tmem addr=%x w=%b", mem_address, mem_write); `endif
231 end 221 end
232end 222end
233 223