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| author | Julian Blake Kongslie | 2021-04-15 16:39:58 -0700 |
|---|---|---|
| committer | Julian Blake Kongslie | 2021-04-15 16:39:58 -0700 |
| commit | abd9703a1b96225db0d7317bf8833467150bae26 (patch) | |
| tree | 1cafad36a4e4773b32fa38e6ca16fa0ca37dcbd1 /altera | |
| parent | Fix timing declarations for PLL in Quartus assignments. (diff) | |
| download | noncpu-abd9703a1b96225db0d7317bf8833467150bae26.tar.xz | |
Change synthesis of PLL wrapper to avoid latch logic.pre-dp-8
Diffstat (limited to 'altera')
0 files changed, 0 insertions, 0 deletions