Use a separate memory module.

Hopefully this will infer a memory the way we want in Quartus.

1 files changed, 30 insertions, 0 deletions

diff --git a/hdl/mem.sv b/hdl/mem.sv
new file mode 100644
index 0000000..906870d
--- /dev/null
+++ b/hdl/mem.sv
@@ -0,0 +1,30 @@
+module mem
+    (   input   bit clk
+
+    ,   output  bit                 ready
+    ,   input   bit                 valid
+    ,   input   bit                 write
+    ,   input   bit [ADDR_BITS-1:0] address
+    ,   input   bit [DATA_BITS-1:0] write_data
+    ,   output  bit [DATA_BITS-1:0] read_data   // Valid exactly the cycle after address is consumed.
+    );
+
+parameter ADDR_BITS;
+parameter DATA_BITS;
+parameter INIT_FILE;
+
+bit [DATA_BITS-1:0] storage [0:(1<<ADDR_BITS)-1];
+initial $readmemh(INIT_FILE, storage);
+
+assign ready = 1;
+
+always_ff @(posedge clk) begin
+    if (ready && valid) begin
+        if (write)
+            storage[address] <= write_data;
+        else
+            read_data <= storage[address];
+    end
+end
+
+endmodule