Add UART receive opbit.

1 files changed, 12 insertions, 0 deletions

diff --git a/hdl/top.sv b/hdl/top.sv
index 3cda157..8d83f35 100644
--- a/hdl/top.sv
+++ b/hdl/top.sv
@@ -118,6 +118,10 @@ always_ff @(posedge clk) begin
                             if (operand[1]) ++acc;
                             if (operand[2]) --acc;
                             if (operand[6]) state = MEMORY;
+                            if (operand[7]) begin
+                                rx_ready = 1;
+                                state = MEMORY;
+                            end
                             if (operand == 0) state = HALT;
                         end
                         'h1: acc = sign_extended_operand;
@@ -205,6 +209,14 @@ always_ff @(posedge clk) begin
                                 tx_data = acc[7:0];
                             end
                         end
+                        if (operand[7]) begin
+                            if (`lag(rx_valid)) begin
+                                rx_ready = 0;
+                                acc = {{(DATA_BITS-8){1'b0}}, `lag(rx_data)};
+                            end else begin
+                                state = MEMORY;
+                            end
+                        end
                     end
                     'h2: begin
                         if (`lag(mem_read_valid)) begin