Add UART receive opbit.

2 files changed, 25 insertions, 4 deletions

diff --git a/mem/jtag_uart.hex b/mem/jtag_uart.hex
index 7b08c66..efe4169 100644
--- a/mem/jtag_uart.hex
+++ b/mem/jtag_uart.hex
@@ -1,3 +1,5 @@
 @0
 
+48 65 6c 6c 6f 2c 20 46 50 47 41 21 0d 0a
+
 00
diff --git a/mem/mem.hex b/mem/mem.hex
index 84caf6d..8619b48 100644
--- a/mem/mem.hex
+++ b/mem/mem.hex
@@ -9,20 +9,32 @@
 000 // fib0: j: 0           # fib[n]; clobbered by ascii printer for inner loop index
 000 // fib1: x: 0           # fib[n+1]; clobbered by ascii printer for digit being printed
 000 // fib2: 0              # fib[n+2]
-116 // start: acc= @fib     # for the toy indirect jump to fib
-306 // store @fib0
+116 // start: acc= @echo    # for the toy indirect jump to fib
+307 // store @x
 170 // acc= 0x70
 301 // store @i
 001 // loop: cla
 281 // ladd i @i
 400 // ifeq 0
-586 // jmp i @fib0          # toy indirect jump to fib
+587 // jmp i @x             # toy indirect jump to fib
 040 // tx
 003 // cla ++acc
 201 // ladd @i
 301 // store @i
 577 // jmp loop
-301 // fib: store @i        # zero, it is known
+080 // echo: rx
+40a // ifeq 0x0a
+504 // jmp fib
+40d // ifeq 0x0d
+502 // jmp fib
+040 // tx
+579 // jmp echo
+10d // fib: acc= 0x0d
+040 // tx
+10a // acc= 0x0a
+040 // tx
+001 // cla
+301 // store @i
 370 // store 0x70           # 0x70 is now beginning of Fibonacci sequence (0)
 003 // cla ++acc
 371 // store 0x71           # 0x71 is 1
@@ -101,6 +113,13 @@
 06c // l
 064 // d
 021 // !
+00d // \r
 00a // \n
+045 // E
+063 // c
+068 // h
+06f // o
+03a // :
+020 // ' '
 
 000