2 files changed, 9 insertions, 6 deletions

diff --git a/Makefile b/Makefile
index 24e2692..f4a0da8 100644
--- a/Makefile
+++ b/Makefile
@@ -9,7 +9,7 @@ sim: build/Vtop
 
 build/Vtop: $(SOURCES) $(COLLATERAL)
         @mkdir -p build
-        verilator +1800-2017ext+sv -Wall -Wno-BLKSEQ -Wno-UNUSED -Wno-WIDTH -O3 -Ihdl $(OPTS) --Mdir build --trace --cc --build -j --exe --top-module top $(SOURCES)
+        verilator +1800-2017ext+sv -Wall -Wno-BLKSEQ -Wno-UNUSED -O3 -Ihdl $(OPTS) --Mdir build --trace --cc --build -j --exe --top-module top $(SOURCES)
 
 clean:
         rm -rf build
diff --git a/hdl/top.sv b/hdl/top.sv
index 3ab61c5..8c693b3 100644
--- a/hdl/top.sv
+++ b/hdl/top.sv
@@ -70,6 +70,8 @@ bit [7:0] operand;
 bit [DATA_BITS-1:0] acc;
 bit [DATA_BITS-1:0] idx;
 
+bit [DATA_BITS-1:0] sign_extended_operand;
+
 enum
     {   FETCH
     ,   DECODE
@@ -110,13 +112,14 @@ always_ff @(posedge clk) begin
                 if (mem_read_valid) begin
                     state = FETCH;
                     {opcode, operand} = mem_read_data;
+                    sign_extended_operand = {{(DATA_BITS-8){operand[7]}}, operand};
                     `ifdef DEBUG $display("\tdecode %x:%x", opcode, operand); `endif
                     case (opcode)
-                        'h0: acc = {{4{operand[7]}}, operand};
+                        'h0: acc = sign_extended_operand;
                         'h1: state = AGEN;
                         'h2: state = AGEN;
-                        'h3: if (acc != operand) ++pc;
-                        'h4: pc = pc + {{4{operand[7]}}, operand};
+                        'h3: if (acc != sign_extended_operand) ++pc;
+                        'h4: pc = pc + sign_extended_operand;
                         'hf: begin
                             if (operand[0]) ++acc;
                             if (operand[1]) --acc;
@@ -139,12 +142,12 @@ always_ff @(posedge clk) begin
                 case (opcode)
                     'h1: begin
                         mem_valid = 1;
-                        mem_address = idx + operand;
+                        mem_address = {2'b0, idx + sign_extended_operand};
                         state = mem_ready ? MEMORY : AGEN;
                     end
                     'h2: begin
                         mem_valid = 1;
-                        mem_address = idx + operand;
+                        mem_address = {2'b0, idx + sign_extended_operand};
                         mem_write = 1;
                         mem_write_data = acc;
                         state = mem_ready ? FETCH : AGEN;