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+Don't ignore 6000 and 6001
+
+Add "interrupts enabled" flag
+6000, 6001, 6002 should properly handle it
+    6000 - skip next instruction if interrupts are enabled; disable interrupts (we should probably do this immediately)
+    6001 - enable interrupts (after next instruction)
+    6002 - disable interrupts (we should probably do this immediately)
+
+Jules thinks clock is most likely interrupt source
+    pdp8 source tries to map clock interrupts to "real time" - we might want to mangle that to make it deterministic
+
+Sources of interrupts observed:
+    PTR flag is set from loader, might be ignorable
+    Memory management is poked from inside ISRs, might be ignorable (MMU should be optional)
+    TTO ready for output interrupt - this looks like a very likely candidate
+    TTI input ready interrupt - this looks like a very likely candidate
+        Looks like these happen even when there is no input available - might be caused by the program itself doing something a little funny