| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Pessimize JTAG UART somewhat. | Julian Blake Kongslie | 2021-03-28 | 2 | -8/+5 |
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| * | Use a separate memory module. | Julian Blake Kongslie | 2021-03-28 | 2 | -9/+110 |
| | | | | | Hopefully this will infer a memory the way we want in Quartus. | ||||
| * | Some more interesting opcodes. | Julian Blake Kongslie | 2021-03-28 | 3 | -24/+62 |
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| * | Initial commit. | Julian Blake Kongslie | 2021-03-28 | 16 | -0/+356 |
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index : noncpu | |
| Unnamed repository; edit this file 'description' to name the repository. | Julian Blake Kongslie |
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