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* Work in progress from May 9Julian Blake Kongslie2021-05-167-38/+64202
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* Add a few more binaries to play with.Julian Blake Kongslie2021-05-093-1/+4
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* Keyboard input.Julian Blake Kongslie2021-05-092-5/+35
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* Delete no-longer-used hex file for pre-PDP-8 ISA.Julian Blake Kongslie2021-05-071-125/+0
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* Add a bunch of microcoded instructions.Julian Blake Kongslie2021-05-022-11/+103
| | | | This is a minimum viable PDP-8 that can print "Hello, world!" and halt.
* Fix a few trivial errors with vector sizes, state names, and syntax.Julian Blake Kongslie2021-04-181-4/+4
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* PDP-8 memory opcodesJulian Blake Kongslie2021-04-181-84/+92
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* Less noisy file format conversion.Julian Blake Kongslie2021-04-181-14/+4
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* Support a proper PDP-8 assembler.Julian Blake Kongslie2021-04-186-72/+333
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* Move the core logic out of the top module.Julian Blake Kongslie2021-04-182-219/+232
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* Change synthesis of PLL wrapper to avoid latch logic.pre-dp-8Julian Blake Kongslie2021-04-152-32/+20
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* Fix timing declarations for PLL in Quartus assignments.Julian Blake Kongslie2021-04-152-1/+2
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* More makefile corrections/simplifications for quartus on Linux.Julian Blake Kongslie2021-04-151-4/+4
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* Properly quote quartus_pgm commandline.Julian Blake Kongslie2021-04-151-1/+1
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* Add a quick and dirty script for computing PLL parameters.Julian Blake Kongslie2021-04-151-0/+23
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* Tell Quartus that we're using a scaled clock.Julian Blake Kongslie2021-04-142-2/+2
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* Improved clean target in MakefileJulian Blake Kongslie2021-04-141-1/+1
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* Makefile support for Linux quartusJulian Blake Kongslie2021-04-141-3/+14
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* Ignore various artifacts of quartus build.Julian Blake Kongslie2021-04-141-0/+12
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* Use internal PLL for clock and reset generation.Julian Blake Kongslie2021-04-143-11/+159
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* Add UART receive opbit.Julian Blake Kongslie2021-04-074-4/+38
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* Switch back to $past-based scheduling; my clever idea wasn't clever enough.Julian Blake Kongslie2021-04-074-101/+74
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* Don't rebuild verilator just for memory file changes.Julian Blake Kongslie2021-04-051-2/+3
| | | | (These files are read when the simulator starts, not when it's built)
* Change the null byte from no-op to halt.Julian Blake Kongslie2021-04-053-3/+3
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* Use the assembler for allocating static storage in the Fib program.Julian Blake Kongslie2021-04-051-51/+51
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* Assembler errors for too-far jumps.Julian Blake Kongslie2021-04-051-0/+2
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* Change our simulator timing model to use continuous assignment guards.Julian Blake Kongslie2021-04-054-86/+113
| | | | | | | Instead of depending on verilator getting $past right, this (ab-)uses the SystemVerilog scheduling model which allows us to get a consistent view of the universe by "isolating" the blocking updates. Easier to code to and seems to be more reliable in verilator.
* Make PC ADDR-sized rather than DATA-sized for nowJulian Blake Kongslie2021-04-051-3/+3
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* Remove some old debug messages.Julian Blake Kongslie2021-04-051-11/+1
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* Longer runtime for verilator before giving up.Julian Blake Kongslie2021-04-051-1/+1
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* Change build system so verilator doesn't require constant "make clean"s.Julian Blake Kongslie2021-04-052-3/+7
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* Remove idx, add indirect jumps, renumber opcodes so NOP=0, add absolute ↵Julian Blake Kongslie2021-04-043-117/+133
| | | | labels to asm.rb
* Add indirect memory operations.Julian Blake Kongslie2021-04-043-8/+34
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* Very fancy improved Fibonacci machine, with HDL convert-to-ASCII functionalityJulian Blake Kongslie2021-04-043-13/+80
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* Remove unneeded .exe suffixes in bat scripts.Julian Blake Kongslie2021-04-042-4/+4
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* Change assembler input to make it idempotent.Julian Blake Kongslie2021-04-041-0/+1
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* Streamlined the Fibonacci program somewhat.Julian Blake Kongslie2021-03-301-17/+10
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* Add a Fibonacci sequence to the end of output (no ASCII conversion yet)Julian Blake Kongslie2021-03-292-13/+20
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* Trivial assembler.Julian Blake Kongslie2021-03-292-10/+71
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* Trivial cleanup of initial memory image.Julian Blake Kongslie2021-03-291-2/+1
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* Convert to using $sampled instead of $past, for more uniformity.Julian Blake Kongslie2021-03-293-13/+9
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* Fix WIDTH warnings from verilator.Julian Blake Kongslie2021-03-292-6/+9
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* Vastly improve the edit-rebuild-debug cycle.Julian Blake Kongslie2021-03-281-0/+7
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* Possibly slightly less lame.Julian Blake Kongslie2021-03-281-10/+10
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* Yet another lame attempt.Julian Blake Kongslie2021-03-282-34/+71
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* Pessimize JTAG UART somewhat.Julian Blake Kongslie2021-03-282-8/+5
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* Use a separate memory module.Julian Blake Kongslie2021-03-282-9/+110
| | | | Hopefully this will infer a memory the way we want in Quartus.
* Some more interesting opcodes.Julian Blake Kongslie2021-03-283-24/+62
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* Initial commit.Julian Blake Kongslie2021-03-2816-0/+356