From 3d88aa92deb2e625a65ae47dfe3fb03513a1ca3a Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Sun, 28 Mar 2021 17:44:17 -0700
Subject: Possibly slightly less lame.

---
 hdl/top.sv | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/hdl/top.sv b/hdl/top.sv
index ac8342e..3ab61c5 100644
--- a/hdl/top.sv
+++ b/hdl/top.sv
@@ -98,18 +98,18 @@ always_ff @(posedge clk) begin
                 mem_valid = 1;
                 mem_address = {2'b0, pc};
                 mem_write = 0;
-                if (`mem_ready) begin
+                if (mem_ready) begin
                     state = DECODE;
                     ++pc;
                 end
             end
 
             DECODE: begin
-                if (`mem_read_valid) begin
-                    mem_valid = 0;
-                    mem_write = 0;
+                mem_valid = 0;
+                mem_write = 0;
+                if (mem_read_valid) begin
                     state = FETCH;
-                    {opcode, operand} = `mem_read_data;
+                    {opcode, operand} = mem_read_data;
                     `ifdef DEBUG $display("\tdecode %x:%x", opcode, operand); `endif
                     case (opcode)
                         'h0: acc = {{4{operand[7]}}, operand};
@@ -140,20 +140,20 @@ always_ff @(posedge clk) begin
                     'h1: begin
                         mem_valid = 1;
                         mem_address = idx + operand;
-                        state = `mem_ready ? MEMORY : AGEN;
+                        state = mem_ready ? MEMORY : AGEN;
                     end
                     'h2: begin
                         mem_valid = 1;
                         mem_address = idx + operand;
                         mem_write = 1;
                         mem_write_data = acc;
-                        state = `mem_ready ? FETCH : AGEN;
+                        state = mem_ready ? FETCH : AGEN;
                     end
                 endcase
             end
 
             MEMORY: begin
-                if (`mem_ready) begin
+                if (mem_ready) begin
                     mem_valid = 0;
                     mem_write = 0;
                 end
@@ -161,8 +161,8 @@ always_ff @(posedge clk) begin
                 `ifdef DEBUG $display("\tstall"); `endif
                 case (opcode)
                     'h1: begin
-                        if (`mem_read_valid) begin
-                            acc = `mem_read_data;
+                        if (mem_read_valid) begin
+                            acc = mem_read_data;
                         end else begin
                             state = MEMORY;
                         end
-- 
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