From 05192e38327492c5d56bd35f4febcdc7fb6ead2f Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Wed, 14 Apr 2021 18:42:02 -0700
Subject: Tell Quartus that we're using a scaled clock.

---
 altera/clocks.sdc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'altera/clocks.sdc')

diff --git a/altera/clocks.sdc b/altera/clocks.sdc
index 239c91a..15d4482 100644
--- a/altera/clocks.sdc
+++ b/altera/clocks.sdc
@@ -1,3 +1,3 @@
 # This is the clock for timing analysis, not timing-driven synthesis.
 # See init.tcl for the other clock.
-create_clock -period "50 MHz" clk
+create_clock -period "45 MHz" clk
-- 
cgit v1.2.3