From 7a1311c16c36b18a66a5ee43511fb9ad5093ec3a Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Sun, 28 Mar 2021 14:48:30 -0700
Subject: Initial commit.

---
 altera/clocks.sdc | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 altera/clocks.sdc

(limited to 'altera/clocks.sdc')

diff --git a/altera/clocks.sdc b/altera/clocks.sdc
new file mode 100644
index 0000000..239c91a
--- /dev/null
+++ b/altera/clocks.sdc
@@ -0,0 +1,3 @@
+# This is the clock for timing analysis, not timing-driven synthesis.
+# See init.tcl for the other clock.
+create_clock -period "50 MHz" clk
-- 
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