From f48faf6598701a9d843e7b8d46a7ddf1bbe790c9 Mon Sep 17 00:00:00 2001 From: Julian Blake Kongslie Date: Mon, 29 Mar 2021 12:36:51 -0700 Subject: Fix WIDTH warnings from verilator. --- hdl/top.sv | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'hdl/top.sv') diff --git a/hdl/top.sv b/hdl/top.sv index 3ab61c5..8c693b3 100644 --- a/hdl/top.sv +++ b/hdl/top.sv @@ -70,6 +70,8 @@ bit [7:0] operand; bit [DATA_BITS-1:0] acc; bit [DATA_BITS-1:0] idx; +bit [DATA_BITS-1:0] sign_extended_operand; + enum { FETCH , DECODE @@ -110,13 +112,14 @@ always_ff @(posedge clk) begin if (mem_read_valid) begin state = FETCH; {opcode, operand} = mem_read_data; + sign_extended_operand = {{(DATA_BITS-8){operand[7]}}, operand}; `ifdef DEBUG $display("\tdecode %x:%x", opcode, operand); `endif case (opcode) - 'h0: acc = {{4{operand[7]}}, operand}; + 'h0: acc = sign_extended_operand; 'h1: state = AGEN; 'h2: state = AGEN; - 'h3: if (acc != operand) ++pc; - 'h4: pc = pc + {{4{operand[7]}}, operand}; + 'h3: if (acc != sign_extended_operand) ++pc; + 'h4: pc = pc + sign_extended_operand; 'hf: begin if (operand[0]) ++acc; if (operand[1]) --acc; @@ -139,12 +142,12 @@ always_ff @(posedge clk) begin case (opcode) 'h1: begin mem_valid = 1; - mem_address = idx + operand; + mem_address = {2'b0, idx + sign_extended_operand}; state = mem_ready ? MEMORY : AGEN; end 'h2: begin mem_valid = 1; - mem_address = idx + operand; + mem_address = {2'b0, idx + sign_extended_operand}; mem_write = 1; mem_write_data = acc; state = mem_ready ? FETCH : AGEN; -- cgit v1.2.3