diff options
Diffstat (limited to '')
| -rw-r--r-- | top.sv | 6 |
1 files changed, 4 insertions, 2 deletions
| @@ -1,5 +1,6 @@ | |||
| 1 | module top | 1 | module top |
| 2 | #( FIB_BITS = 16 | 2 | #( FIB_BITS = 16 |
| 3 | , FIB_BASE = 10 | ||
| 3 | , ROM_BITS = 8 | 4 | , ROM_BITS = 8 |
| 4 | ) | 5 | ) |
| 5 | ( input bit clk // verilator public | 6 | ( input bit clk // verilator public |
| @@ -58,6 +59,7 @@ bit [7:0] fib_a_data; | |||
| 58 | 59 | ||
| 59 | ntoa | 60 | ntoa |
| 60 | #( .BITS(FIB_BITS) | 61 | #( .BITS(FIB_BITS) |
| 62 | , .BASE(FIB_BASE) | ||
| 61 | ) fib_ntoa | 63 | ) fib_ntoa |
| 62 | ( .clk(clk) | 64 | ( .clk(clk) |
| 63 | , .reset(reset) | 65 | , .reset(reset) |
| @@ -97,9 +99,9 @@ always_ff @(posedge clk) begin | |||
| 97 | if (!tx_valid && (data != 0)) begin | 99 | if (!tx_valid && (data != 0)) begin |
| 98 | tx_valid = 1; | 100 | tx_valid = 1; |
| 99 | tx_data = data; | 101 | tx_data = data; |
| 100 | addr = addr + 1; | 102 | ++addr; |
| 101 | end else if (data == 0) begin | 103 | end else if (data == 0) begin |
| 102 | addr = addr + 1; | 104 | ++addr; |
| 103 | state = state.next; | 105 | state = state.next; |
| 104 | end | 106 | end |
| 105 | end | 107 | end |
