From 5c1df6d27f5dac143efc9ce84689b863dbee45bd Mon Sep 17 00:00:00 2001
From: Julian Blake Kongslie
Date: Wed, 24 Mar 2021 08:35:07 -0700
Subject: Reorganize repo layout to make it a little easier to work within.

---
 sim/main.cpp | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 sim/main.cpp

(limited to 'sim')

diff --git a/sim/main.cpp b/sim/main.cpp
new file mode 100644
index 0000000..3f49cb6
--- /dev/null
+++ b/sim/main.cpp
@@ -0,0 +1,56 @@
+#include <cstdint>
+#include <iostream>
+#include <verilated.h>
+#include <verilated_vcd_c.h>
+
+#include "Vtop.h"
+
+int main(int argc, const char *argv[])
+{
+    Verilated::commandArgs(argc, argv);
+
+    Verilated::traceEverOn(true);
+    VerilatedVcdC vcd;
+
+    Vtop top;
+    top.trace(&vcd, 100 /* levels of hierarchy */);
+
+    vcd.set_time_unit("ns");
+    vcd.set_time_resolution("ns");
+    vcd.open("build/out.vcd");
+
+    std::cout << "*** RESET SEQUENCE ***\n";
+
+    std::uint64_t time = 0;
+
+    top.clk = 0;
+    top.reset_n = 0;
+    top.eval();
+    vcd.dump(++time);
+
+    top.clk = 1;
+    top.eval();
+    vcd.dump(++time);
+
+    top.clk = 0;
+    top.reset_n = 1;
+    top.eval();
+    vcd.dump(++time);
+
+    std::cout << "*** MAIN LOOP ***\n";
+
+    for (unsigned int i = 0; i < 500 && !Verilated::gotFinish(); ++i) {
+        top.clk = 1;
+        top.eval();
+        vcd.dump(++time);
+        top.clk = 0;
+        top.eval();
+        vcd.dump(++time);
+    }
+
+    std::cout << "\n";
+
+    vcd.close();
+
+    return 0;
+}
-- 
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