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authorJulian Blake Kongslie2022-10-31 19:55:32 -0700
committerJulian Blake Kongslie2022-10-31 19:55:32 -0700
commit6b45e0f81267be6140f0f178579494ca6d24443b (patch)
treec0ed8beeb65259e3069dd04ddff54b4b16593310 /isa/decode.cpp
parentLevel-trigger on TTO_FLAG instead of edge-trigger. (diff)
downloadbiggolf-6b45e0f81267be6140f0f178579494ca6d24443b.tar.xz
Restructure a lot of the control registers
Diffstat (limited to 'isa/decode.cpp')
-rw-r--r--isa/decode.cpp45
1 files changed, 28 insertions, 17 deletions
diff --git a/isa/decode.cpp b/isa/decode.cpp
index 1496364..201a684 100644
--- a/isa/decode.cpp
+++ b/isa/decode.cpp
@@ -1,12 +1,18 @@
1#include <cassert> 1#include <cassert>
2#include <cstdint>
2#include <iostream> 3#include <iostream>
3 4
4#include "isa/isa.h" 5#include "isa/isa.h"
5 6
6instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bits, bool interrupt) 7instruction_context decode(std::uint_fast32_t flags, unsigned int pc, unsigned int bits, bool interrupt)
7{ 8{
8 auto df = dfifb >> 3; 9 //bool gt = (flags >> 10) & 1;
9 auto ifb = dfifb & 00007; 10 //bool ir = (flags >> 9) & 1;
11 //bool ii = (flags >> 8) & 1;
12 //bool ie = (flags >> 7) & 1;
13 //bool u = (flags >> 6) & 1;
14 bool ifb = (flags >> 3) & 7;
15 bool df = flags & 7;
10 16
11 instruction_context inst; 17 instruction_context inst;
12 inst.next_pc = (pc & ~07777) | ((pc + 1) & 07777); 18 inst.next_pc = (pc & ~07777) | ((pc + 1) & 07777);
@@ -16,6 +22,7 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit
16 assert(df == 0); 22 assert(df == 0);
17 assert(ifb == 0); 23 assert(ifb == 0);
18 inst.next_pc = pc; 24 inst.next_pc = pc;
25 pc = 0;
19 } 26 }
20 27
21 switch (bits >> 9) { 28 switch (bits >> 9) {
@@ -79,42 +86,46 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit
79 switch (bits & 07) { 86 switch (bits & 07) {
80 case 0: 87 case 0:
81 // SKON skip if interrupts enabled 88 // SKON skip if interrupts enabled
82 inst.read_ctlreg = INT_ENABLE; 89 inst.read_ctlreg = FLAGS;
83 inst.possibly_redirects = true; 90 inst.possibly_redirects = true;
84 inst.ef = [](auto &ctx) { 91 inst.ef = [](auto &ctx) {
85 if (ctx.ctlval.value() & 1) 92 if (ctx.ctlval.value() & FLAG_INT_ENABLE)
86 ctx.next_pc = (ctx.next_pc & 07777) | ((ctx.next_pc + 1) & 07777); 93 ctx.next_pc = (ctx.next_pc & 07777) | ((ctx.next_pc + 1) & 07777);
87 }; 94 };
88 break; 95 break;
89 case 1: 96 case 1:
90 // ION set int_enable_delay 97 // ION set int_enable_delay
91 inst.read_ctlreg = INT_ENABLE; 98 inst.read_ctlreg = FLAGS;
92 inst.write_ctlreg = INT_ENABLE; 99 inst.write_ctlreg = FLAGS;
93 inst.ef = [](auto &ctx) { 100 inst.ef = [](auto &ctx) {
94 ctx.ctlval.value() |= 2; 101 ctx.ctlval.value() |= FLAG_INT_ENABLE_DELAY;
95 }; 102 };
96 break; 103 break;
97 case 2: 104 case 2:
98 // IOFF clear int_enable and int_enable_delay 105 // IOFF clear int_enable and int_enable_delay
99 inst.write_ctlreg = INT_ENABLE; 106 inst.read_ctlreg = FLAGS;
107 inst.write_ctlreg = FLAGS;
100 inst.ef = [](auto &ctx) { 108 inst.ef = [](auto &ctx) {
101 ctx.ctlval = 0; 109 ctx.ctlval.value() &= ~FLAG_INT_ENABLE_DELAY & ~FLAG_INT_ENABLE;
102 }; 110 };
103 break; 111 break;
104 case 3: 112 case 3:
105 // SRQ skip if pending interrupt 113 // SRQ skip if pending interrupt
106 inst.read_ctlreg = INT_PENDING; 114 inst.read_ctlreg = FLAGS;
107 inst.possibly_redirects = true; 115 inst.possibly_redirects = true;
108 inst.ef = [](auto &ctx) { 116 inst.ef = [](auto &ctx) {
109 if (ctx.ctlval.value()) 117 if (ctx.ctlval.value() & FLAG_INT_REQUEST)
110 ctx.next_pc = (ctx.next_pc & 07777) | ((ctx.next_pc + 1) & 07777); 118 ctx.next_pc = (ctx.next_pc & 07777) | ((ctx.next_pc + 1) & 07777);
111 }; 119 };
112 break; 120 break;
113 case 4: 121 case 4:
114 // GTF get flags 122 // GTF get flags
123 inst.read_ctlreg = FLAGS;
124 inst.need_read_link = true;
115 inst.ef = [](auto &ctx) { 125 inst.ef = [](auto &ctx) {
116 std::cerr << "unimplemented GTF\n"; 126 auto flags = ctx.ctlval.value();
117 assert(false); 127 flags |= (unsigned int)ctx.link.value() << 11;
128 ctx.acc = flags;
118 }; 129 };
119 break; 130 break;
120 case 5: 131 case 5:
@@ -153,11 +164,11 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit
153 }; 164 };
154 break; 165 break;
155 case 5: 166 case 5:
156 // KIE set TT_INT_ENABLE to the low bit of the accumulator 167 // KIE set TT_FLAGS from the accumulator
157 inst.need_read_acc = true; 168 inst.need_read_acc = true;
158 inst.write_ctlreg = TT_INT_ENABLE; 169 inst.write_ctlreg = TT_FLAGS;
159 inst.ef = [](auto &ctx) { 170 inst.ef = [](auto &ctx) {
160 ctx.ctlval = ctx.acc.value() & 3; 171 ctx.ctlval = ctx.acc.value();
161 }; 172 };
162 break; 173 break;
163 case 6: 174 case 6: