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authorJulian Blake Kongslie2022-10-07 19:24:27 -0700
committerJulian Blake Kongslie2022-10-07 19:24:27 -0700
commit2c13075cb50aaba5a6af0185b8f520347a8ab4b4 (patch)
tree900b8ca92095272408b4434313ba81fef11856c3 /isa
parentInitial commit. (diff)
downloadbiggolf-2c13075cb50aaba5a6af0185b8f520347a8ab4b4.tar.xz
Minor cleanup and some compilation fixes.
Diffstat (limited to 'isa')
-rw-r--r--isa/checker.cpp13
-rw-r--r--isa/checker.h20
-rw-r--r--isa/decode.cpp2
-rw-r--r--isa/isa.h4
4 files changed, 31 insertions, 8 deletions
diff --git a/isa/checker.cpp b/isa/checker.cpp
index cd802a8..604279a 100644
--- a/isa/checker.cpp
+++ b/isa/checker.cpp
@@ -1,15 +1,16 @@
1#include <cassert> 1#include <cassert>
2 2
3#include "isa/checker.h"
3#include "isa/isa.h" 4#include "isa/isa.h"
4 5
5void checker::execute() { 6void checker::execute() {
6 assert(!halt); 7 assert(!halted);
7 auto int_enable_delay = ctlregs[ctlreg::INT_ENABLE] >> 1; 8 auto int_enable_delay = ctlregs[INT_ENABLE] >> 1;
8 if (ctlregs[ctlreg::INT_ENABLE] & 1) { 9 if (ctlregs[INT_ENABLE] & 1) {
9 // check for interrupt 10 // check for interrupt
10 } 11 }
11 ctlregs[ctlreg::INT_ENABLE] = (int_enable_delay << 1) | int_enable_delay; 12 ctlregs[INT_ENABLE] = (int_enable_delay << 1) | int_enable_delay;
12 inst = decode(ctlregs[ctlreg::DATA_INSTRUCTION_FIELD_BUFFER], 13 auto inst = decode(ctlregs[DATA_INSTRUCTION_FIELD_BUFFER],
13 pc, 14 pc,
14 mem.fetch(pc)); 15 mem.fetch(pc));
15 auto next_pc = inst.next_pc; 16 auto next_pc = inst.next_pc;
@@ -40,5 +41,5 @@ void checker::execute() {
40 mem.store(inst.final_address.value(), inst.data.value()); 41 mem.store(inst.final_address.value(), inst.data.value());
41 assert(inst.next_pc == next_pc || inst.possibly_redirects); 42 assert(inst.next_pc == next_pc || inst.possibly_redirects);
42 pc = inst.next_pc; 43 pc = inst.next_pc;
43 halt = inst.halt; 44 halted = inst.halt;
44} 45}
diff --git a/isa/checker.h b/isa/checker.h
new file mode 100644
index 0000000..6aae3ff
--- /dev/null
+++ b/isa/checker.h
@@ -0,0 +1,20 @@
1#pragma once
2
3#include <array>
4
5#include "isa/isa.h"
6
7struct funcmem {
8 unsigned int fetch(unsigned int address);
9 void store(unsigned int address, unsigned int value);
10};
11
12struct checker {
13 unsigned int acc = 0;
14 unsigned int link = 0;
15 unsigned int pc = 0;
16 std::array<unsigned int, NUM_CTLREGS> ctlregs;
17 bool halted = false;
18 funcmem mem;
19 void execute();
20};
diff --git a/isa/decode.cpp b/isa/decode.cpp
index 8a85d41..5212ae7 100644
--- a/isa/decode.cpp
+++ b/isa/decode.cpp
@@ -79,7 +79,7 @@ instruction_context decode(unsigned int dfifb, unsigned int pc, unsigned int bit
79 79
80 // Instructions with memory operands may be direct or indirect 80 // Instructions with memory operands may be direct or indirect
81 if (inst.need_exec_load || inst.need_exec_store || inst.possibly_redirects) { 81 if (inst.need_exec_load || inst.need_exec_store || inst.possibly_redirects) {
82 auto addr = (df << 12) | ((bits & 00200) ? (next_pc & 07600) : 0) | (bits & 00177); 82 auto addr = (df << 12) | ((bits & 00200) ? (inst.next_pc & 07600) : 0) | (bits & 00177);
83 if (bits & 00400) { 83 if (bits & 00400) {
84 inst.need_indirect_load = true; 84 inst.need_indirect_load = true;
85 inst.init_address = addr; 85 inst.init_address = addr;
diff --git a/isa/isa.h b/isa/isa.h
index 3effb5b..3b8220e 100644
--- a/isa/isa.h
+++ b/isa/isa.h
@@ -5,10 +5,12 @@
5 5
6#include "infra/pipetrace.h" 6#include "infra/pipetrace.h"
7 7
8enum class ctlreg { 8enum ctlreg {
9 DATA_INSTRUCTION_FIELD_BUFFER, // (df << 3) | if_buffer 9 DATA_INSTRUCTION_FIELD_BUFFER, // (df << 3) | if_buffer
10 DATA_INSTRUCTION_FIELD_SAVED, // (df_saved << 3) | if_saved 10 DATA_INSTRUCTION_FIELD_SAVED, // (df_saved << 3) | if_saved
11 INT_ENABLE, // (int_enable_delay << 1) | int_enable 11 INT_ENABLE, // (int_enable_delay << 1) | int_enable
12
13 NUM_CTLREGS,
12}; 14};
13 15
14struct instruction_context { 16struct instruction_context {