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-rw-r--r--sim/rf.sv39
1 files changed, 39 insertions, 0 deletions
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1module rf
2 #( parameter UROM = "<no file specified>"
3 , parameter UIP_BITS = 15
4 , parameter UROM_BITS = 8
5 , parameter BUS_BITS = 16
6 , parameter NAME_BITS = 3
7 )
8 ( input bit clk
9 , input bit reset
10 , input bit [UIP_BITS-1:0] uip
11 , inout bit [BUS_BITS-1:0] abus
12 , inout bit [BUS_BITS-1:0] dbus
13 );
14
15bit [BUS_BITS-1:0] storage [0:(1<<NAME_BITS)-1];
16
17typedef enum
18 { STORE
19 , RESET
20 , OUTDATA
21 } CtrlBit;
22
23bit [UROM_BITS-1:0] ctrl;
24urom#(UROM, UIP_BITS, UROM_BITS) urom(uip, ctrl);
25
26assign dbus = ctrl[OUTDATA] ? storage[abus[NAME_BITS-1:0]] : {(BUS_BITS){1'bZ}};
27
28always @(posedge clk) begin
29 if (reset || ctrl[RESET]) begin
30 for (int i = 0; i < (1 << NAME_BITS); ++i)
31 storage[i] <= 0;
32 end else begin
33 if (ctrl[STORE]) begin
34 storage[abus[NAME_BITS-1:0]] <= dbus;
35 end
36 end
37end
38
39endmodule