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| author | Julian Blake Kongslie | 2022-03-18 09:21:35 -0700 |
|---|---|---|
| committer | Julian Blake Kongslie | 2022-03-18 09:21:35 -0700 |
| commit | 5743c10d698c87cd379af7276fb435dedd11c4cc (patch) | |
| tree | ad1e3e34da9ad8fe2ec392b10536af7a092a4b2a /PLAN | |
| parent | Minor paranoia about ensuring that we're in the correct half_state (diff) | |
| download | multipdp8-5743c10d698c87cd379af7276fb435dedd11c4cc.tar.xz | |
Redraw the diagram in PLAN to make it a little prettier.
Diffstat (limited to 'PLAN')
| -rw-r--r-- | PLAN | 69 |
1 files changed, 46 insertions, 23 deletions
| @@ -1,31 +1,54 @@ | |||
| 1 | 1. fix hello.pal (in noncpu) | 1 | 1. fix hello.pal (in noncpu) |
| 2 | 2. fix hello.pal (in multipdp8) (it only sees bytes with the lowest bit set) | 2 | 2. fix hello.pal (in multipdp8) (it only sees bytes with the lowest bit set) |
| 3 | 3 | ||
| 4 | +-----------+ | 4 | Command block: |
| 5 | +-----| Arbiter 1 |<--------------------------------------------+ | ||
| 6 | | +-----------+ | | ||
| 7 | | ^ | | ||
| 8 | v | | | ||
| 9 | +--------+ +----------------+ +----------------+ +----------------+ | ||
| 10 | | UART 0 |-->| Command Parser |-----+ | Off-chip DRAM | | Result Printer | | ||
| 11 | +--------+ +----------------+ | +----------------+ +----------------+ | ||
| 12 | | ^ | ^ | ||
| 13 | | | v | | ||
| 14 | +--------+ +-------+ | +----------------+ | | ||
| 15 | | UART 1 |-->| PDP-8 | v | RAM Controller | | | ||
| 16 | +--------+ +-------+ +-----------+ +----------------+ +-------------+ | ||
| 17 | | Cache |--------->| Arbiter 2 |-->| Another Cache |-->| Broadcaster | | ||
| 18 | +-------+ +-----------+ +----------------+ +-------------+ | ||
| 19 | ^ | | ||
| 20 | | | | ||
| 21 | +-------------------------------------------------------------+ | ||
| 22 | 5 | ||
| 23 | Arbiter 1: Trivial priority arbiter | 6 | +--------------+ +----------------+ |
| 24 | Arbiter 2: Adds clog2(1 + number of PDP-8s) tag bits indicating which channel was selected | 7 | +-----| Echo Arbiter |<--| Result Printer |<-------------------------------+ |
| 25 | For inputs coming from a PDP-8 as opposed to the command parser, add the appropriate prefix to the memory address | 8 | | +--------------+ +----------------+ | |
| 26 | Broadcaster: Removes clog2(1 + number of PDP-8s) tag bits to determine which channel to send to | 9 | | ^ | |
| 27 | For outputs going to a PDP-8 as opposed to the result printer, strip excess address bits | 10 | v | | |
| 11 | +--------+ +----------------+ | | ||
| 12 | | UART 0 |-->| Command Parser |------------+ RAM block: | | ||
| 13 | +--------+ +----------------+ | | | ||
| 14 | | +----------------+ | | ||
| 15 | | | Off-chip DRAM | | | ||
| 16 | | +----------------+ | | ||
| 17 | PDP-8 block: | ^ | | | ||
| 18 | | | v | | ||
| 19 | +--------+ +-------+ | +----------------+ | | ||
| 20 | | UART 1 |<->| PDP-8 | v | RAM Controller | | | ||
| 21 | +--------+ +-------+ +-------------+ +----------------+ +---------------+ | ||
| 22 | | Cache |------------------>| Mem Arbiter |-->| Another Cache |-->| Mem Broadcast | | ||
| 23 | +-------+ +-------------+ +----------------+ +---------------+ | ||
| 24 | ^ ^ | | | ||
| 25 | | | | | | ||
| 26 | +--------------------------------------------------------------+ | | ||
| 27 | | | | ||
| 28 | * | | | ||
| 29 | * (PDP-8s are replicated) | | | ||
| 30 | * | | | ||
| 31 | | | | ||
| 32 | +--------+ +-------+ | | | ||
| 33 | | UART N |<->| PDP-8 | | | | ||
| 34 | +--------+ +-------+ | | | ||
| 35 | | Cache |---------------------+ | | ||
| 36 | +-------+ | | ||
| 37 | ^ | | ||
| 38 | | | | ||
| 39 | +----------------------------------------------------------------+ | ||
| 28 | 40 | ||
| 41 | Echo Arbiter: Trivial priority arbiter (input echo has priority over the result printer) | ||
| 42 | Nen Arbiter: Adds clog2(1 + number of PDP-8s) tag bits indicating which channel was selected | ||
| 43 | For inputs coming from a PDP-8 as opposed to the command parser, add the appropriate prefix to the memory address | ||
| 44 | Mem Broadcast: Removes clog2(1 + number of PDP-8s) tag bits to determine which channel to send to | ||
| 45 | For outputs going to a PDP-8 as opposed to the result printer, strip excess address bits | ||
| 46 | |||
| 47 | Note that the mem arbiter and broadcast have to be as wide as (number of | ||
| 48 | PDP-8s)+1, so they will wind up being bottlenecks. The memory protocol allows | ||
| 49 | arbitrary stalls, so multi-cycle arbitration is possible. | ||
| 50 | |||
| 51 | Not shown is the front panel interface. | ||
| 29 | 52 | ||
| 30 | 53 | ||
| 31 | For the front panel: | 54 | For the front panel: |
