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| author | Julian Blake Kongslie | 2022-03-27 16:59:47 -0700 |
|---|---|---|
| committer | Julian Blake Kongslie | 2022-03-27 16:59:47 -0700 |
| commit | 5b3b33213b0c844070d1da3832edeaf029bda191 (patch) | |
| tree | a35d33b4639682c8096107cdfb43dfa875d13067 /hdl/pll.sv | |
| parent | Add a clock output pin for debugging the PLL. (diff) | |
| download | multipdp8-5b3b33213b0c844070d1da3832edeaf029bda191.tar.xz | |
Use the DF and IF switches as a selector for which PDP-8 owns the panel.
Diffstat (limited to 'hdl/pll.sv')
0 files changed, 0 insertions, 0 deletions