path: root/hdl/top.sv

`include "defs.svh"

module top
    (   input   bit             clock
    ,   input   bit             resetn

    ,   inout   wire    [10:1]  gpioa
    ,   inout   wire    [28:13] gpiob
    ,   inout   wire    [40:31] gpioc

    ,   output  wire            rs232_rxd
    ,   input   wire            rs232_txd
    ,   output  wire            rs232_cts
    ,   input   wire            rs232_rts

    ,   output  wire            debug_tx
    ,   output  wire            debug_rx

    ,   output  bit             ram_resetn
    ,   output  bit             ram_csn
    ,   output  bit             ram_clkp
    ,   output  bit             ram_clkn
    ,   inout   bit             ram_rwds
    ,   inout   bit     [7:0]   ram_data
    );

    assign debug_tx = rs232_rxd;
    assign debug_rx = rs232_txd;

    bit internal_clock;
    bit internal_reset;
    pll
        #(  .MULTIPLY_BY(1)
        ,   .DIVIDE_BY(1)
        ) fastpll
        (   .native_clk(clock)
        ,   .reset_n(resetn)
        ,   .target_clk(internal_clock)
        ,   .reset(internal_reset)
        );

    bit rs232_tx_clock;
    bit rs232_tx_reset = 1;
    always @(posedge rs232_tx_clock) begin
        if (internal_reset) begin
            rs232_tx_reset = 1;
        end else begin
            rs232_tx_reset = 0;
        end
    end

    bit rs232_rx_clock;
    assign rs232_rx_clock = internal_clock;

    bit rs232_clock_busy;

    bit         wire_tx_ready;
    bit         wire_tx_valid;
    uart_byte_t wire_tx_data;

    rs232_tx
        #(  .PARITY(1)
        ,   .STOP_BITS(2)
        ) wiretx
        (   .clock(rs232_tx_clock)
        ,   .reset(rs232_tx_reset)

        ,   .clock_busy(rs232_clock_busy)

        ,   .out_ready(wire_tx_ready)
        ,   .out_valid(wire_tx_valid)
        ,   .out_data(wire_tx_data)

        ,   .rxd(rs232_rxd)
        ,   .rts(rs232_rts)
        );

    bit         rs232_tx_ready;
    bit         rs232_tx_valid;
    uart_byte_t rs232_tx_data;

    fifo
        #(  .WIDTH_BITS($bits(uart_byte_t))
        ) fifotx
        (   .clock_in(internal_clock)
        ,   .clock_out(rs232_tx_clock)
        ,   .reset(internal_reset || rs232_tx_reset)

        ,   .in_ready(rs232_tx_ready)
        ,   .in_valid(rs232_tx_valid)
        ,   .in_data(rs232_tx_data)

        ,   .out_ready(wire_tx_ready)
        ,   .out_valid(wire_tx_valid)
        ,   .out_data(wire_tx_data)
        );

    bit         wire_rx_ready;
    bit         wire_rx_valid;
    uart_byte_t wire_rx_data;

    rs232_rx
        #(  .PARITY(1)
        ,   .OVERSAMPLE((50_000_000 / 1_000_000)-1)
        ) wirerx
        (   .clock(rs232_rx_clock)
        ,   .reset(internal_reset)

        ,   .clock_busy(rs232_clock_busy)
        ,   .clock_out(rs232_tx_clock)

        ,   .in_ready(wire_rx_ready)
        ,   .in_valid(wire_rx_valid)
        ,   .in_data(wire_rx_data)

        ,   .txd(rs232_txd)
        ,   .cts(rs232_cts)
        );

    bit         rs232_rx_ready;
    bit         rs232_rx_valid;
    uart_byte_t rs232_rx_data;

    fifo
        #(  .WIDTH_BITS($bits(uart_byte_t))
        ) fiforx
        (   .clock_in(rs232_rx_clock)
        ,   .clock_out(internal_clock)
        ,   .reset(internal_reset)

        ,   .in_ready(wire_rx_ready)
        ,   .in_valid(wire_rx_valid)
        ,   .in_data(wire_rx_data)

        ,   .out_ready(rs232_rx_ready)
        ,   .out_valid(rs232_rx_valid)
        ,   .out_data(rs232_rx_data)
        );

    bit         ram_rx_ready;
    bit         ram_rx_valid;
    uart_byte_t ram_rx_data;

    bit         ram_tx_ready;
    bit         ram_tx_valid;
    uart_byte_t ram_tx_data;

    bit         ram_echo_in0_ready;
    bit         ram_echo_in0_valid;
    uart_byte_t ram_echo_in0_data;

    bit         ram_echo_in1_ready;
    bit         ram_echo_in1_valid;
    uart_byte_t ram_echo_in1_data;

    bit             command_ready;
    bit             command_valid;
    arb_to_ram_t    command_data;

    bit             ram_command_ready;
    bit             ram_command_valid;
    arb_to_ram_t    ram_command_data;

    bit                 ram_response_ready;
    bit                 ram_response_valid;
    ram_to_arb_t        ram_response_data;

    bit                 print_ready;
    bit                 print_valid;
    ram_to_arb_t        print_data;

    bit loop_ready;
    bit loop_valid;
    bit loop_data;

    bit             [`NUM_PDPS-1:0] pdp_command_ready;
    bit             [`NUM_PDPS-1:0] pdp_command_valid;
    core_to_mem_t   [`NUM_PDPS-1:0] pdp_command_data;

    bit                 [`NUM_PDPS-1:0] pdp_response_ready;
    bit                 [`NUM_PDPS-1:0] pdp_response_valid;
    mem_to_core_t       [`NUM_PDPS-1:0] pdp_response_data;

    bit         ram_rwds_oe;
    bit         ram_rwds_out;
    assign ram_rwds = ram_rwds_oe ? ram_rwds_out : 1'bZ;

    bit         ram_data_oe;
    bit [7:0]   ram_data_out;
    assign ram_data = ram_data_oe ? ram_data_out : 8'bZ;

/*
    alt_jtag_atlantic
        #(  .INSTANCE_ID(0)
        ,   .LOG2_RXFIFO_DEPTH(10)
        ,   .LOG2_TXFIFO_DEPTH(10)
        ,   .SLD_AUTO_INSTANCE_INDEX("NO")
        ) ram_jtag
        (   .clk(internal_clock)
        ,   .rst_n(!internal_reset)

        ,   .r_dat(ram_tx_data)
        ,   .r_val(ram_tx_valid)
        ,   .r_ena(ram_tx_ready)

        ,   .t_dat(ram_rx_data)
        ,   .t_dav(ram_rx_ready)
        ,   .t_ena(ram_rx_valid)
        );
*/

    assign ram_tx_ready = rs232_tx_ready;
    assign rs232_tx_valid = ram_tx_valid;
    assign rs232_tx_data = ram_tx_data;

    assign rs232_rx_ready = ram_rx_ready;
    assign ram_rx_valid = rs232_rx_valid;
    assign ram_rx_data = rs232_rx_data;

    echo_arbiter uart0arb
        (   .clock(internal_clock)
        ,   .reset(internal_reset)

        ,   .in0_ready(ram_echo_in0_ready)
        ,   .in0_valid(ram_echo_in0_valid)
        ,   .in0_data(ram_echo_in0_data)

        ,   .in1_ready(ram_echo_in1_ready)
        ,   .in1_valid(ram_echo_in1_valid)
        ,   .in1_data(ram_echo_in1_data)

        ,   .out_ready(ram_tx_ready)
        ,   .out_valid(ram_tx_valid)
        ,   .out_data(ram_tx_data)
        );

    bit clear_caches;

    command_parser parser
        (   .clock(internal_clock)
        ,   .reset(internal_reset)

        ,   .uart_ready(ram_rx_ready)
        ,   .uart_valid(ram_rx_valid)
        ,   .uart_data(ram_rx_data)

        ,   .echo_ready(ram_echo_in0_ready)
        ,   .echo_valid(ram_echo_in0_valid)
        ,   .echo_data(ram_echo_in0_data)

        ,   .command_ready(command_ready)
        ,   .command_valid(command_valid)
        ,   .command_data(command_data)

        ,   .loop_ready(loop_ready)
        ,   .loop_valid(loop_valid)
        ,   .loop_data(loop_data)

        ,   .clear_caches(clear_caches)
        );

    mem_arbiter memarb
        (   .clock(internal_clock)
        ,   .reset(internal_reset)

        ,   .command_ready(command_ready)
        ,   .command_valid(command_valid)
        ,   .command_data(command_data)

        ,   .pdp_ready(pdp_command_ready)
        ,   .pdp_valid(pdp_command_valid)
        ,   .pdp_data(pdp_command_data)

        ,   .ram_ready(ram_command_ready)
        ,   .ram_valid(ram_command_valid)
        ,   .ram_data(ram_command_data)
        );

    ram_controller ram
        (   .clock(internal_clock)
        ,   .reset(internal_reset)

        ,   .command_ready(ram_command_ready)
        ,   .command_valid(ram_command_valid)
        ,   .command_data(ram_command_data)

        ,   .result_ready(ram_response_ready)
        ,   .result_valid(ram_response_valid)
        ,   .result_data(ram_response_data)

        ,   .ram_resetn(ram_resetn)
        ,   .ram_csn(ram_csn)
        ,   .ram_clkp(ram_clkp)
        ,   .ram_clkn(ram_clkn)
        ,   .ram_rwds_oe(ram_rwds_oe)
        ,   .ram_rwds_in(ram_rwds)
        ,   .ram_rwds_out(ram_rwds_out)
        ,   .ram_data_oe(ram_data_oe)
        ,   .ram_data_in(ram_data)
        ,   .ram_data_out(ram_data_out)
        );

    mem_broadcast memcast
        (   .clock(internal_clock)
        ,   .reset(internal_reset)

        ,   .ram_ready(ram_response_ready)
        ,   .ram_valid(ram_response_valid)
        ,   .ram_data(ram_response_data)

        ,   .print_ready(print_ready)
        ,   .print_valid(print_valid)
        ,   .print_data(print_data)

        ,   .pdp_ready(pdp_response_ready)
        ,   .pdp_valid(pdp_response_valid)
        ,   .pdp_data(pdp_response_data)
        );

    result_printer print
        (   .clock(internal_clock)
        ,   .reset(internal_reset)

        ,   .result_ready(print_ready)
        ,   .result_valid(print_valid)
        ,   .result_data(print_data)

        ,   .echo_ready(ram_echo_in1_ready)
        ,   .echo_valid(ram_echo_in1_valid)
        ,   .echo_data(ram_echo_in1_data)

        ,   .loop_ready(loop_ready)
        ,   .loop_valid(loop_valid)
        ,   .loop_data(loop_data)
        );

    bit slow_clock;
    bit slow_reset;
    pll
        #(  .MULTIPLY_BY(1)
        ,   .DIVIDE_BY(500)
        ) slowpll
        (   .native_clk(clock)
        ,   .reset_n(resetn)
        ,   .target_clk(slow_clock)
        ,   .reset(slow_reset)
        );

    bit [8:1][12:1] led;
    bit [3:1][12:1] switch;

    front_panel panel
        (   .clk(slow_clock)
        ,   .reset(slow_reset)

        ,   .led(led)
        ,   .switch(switch)

        ,   .gpioa(gpioa)
        ,   .gpiob(gpiob)
        ,   .gpioc(gpioc)
        );

    bit [2:0] switch_df;
    bit [2:0] switch_if;
    bit [11:0] switch_sr;
    bit switch_start;
    bit switch_load_add;
    bit switch_dep;
    bit switch_exam;
    bit switch_cont;
    bit switch_stop;
    bit switch_sing_step;
    bit switch_sing_inst;

    // Note that we are reversing the order here on a number of aggregates because
    // the panel model gives us LEDs and switches in schematic-order, which is the
    // opposite of the bit order
    assign switch_df = {switch[2][1], switch[2][2], switch[2][3]};
    assign switch_if = {switch[2][4], switch[2][5], switch[2][6]};
    assign switch_sr = {switch[1][1], switch[1][2], switch[1][3], switch[1][4], switch[1][5], switch[1][6], switch[1][7], switch[1][8], switch[1][9], switch[1][10], switch[1][11], switch[1][12]};
    assign switch_start = switch[3][1];
    assign switch_load_add = switch[3][2];
    assign switch_dep = switch[3][3];
    assign switch_exam = switch[3][4];
    assign switch_cont = switch[3][5];
    assign switch_stop = switch[3][6];
    `ifdef HISTORIC_SWITCH_BEHAVIOUR
    assign switch_sing_step = !switch[3][7];
    assign switch_sing_inst = !switch[3][8];
    `else
    assign switch_sing_step = switch[3][7];
    assign switch_sing_inst = switch[3][8];
    `endif

    bit [11:0] led_pc;
    bit [11:0] led_memaddr;
    bit [11:0] led_memdata;
    bit [11:0] led_acc;
    bit [11:0] led_mq;
    bit led_and;
    bit led_tad;
    bit led_isz;
    bit led_dca;
    bit led_jms;
    bit led_jmp;
    bit led_iot;
    bit led_opr;
    bit led_fetch;
    bit led_execute;
    bit led_defer;
    bit led_word_count;
    bit led_current_address;
    bit led_break;
    bit led_ion;
    bit led_pause;
    bit led_run;
    bit [4:0] led_step_counter;
    bit [2:0] led_df;
    bit [2:0] led_if;
    bit led_link;

    // Note that we are reversing the order here on a number of aggregates because
    // the panel model gives us LEDs and switches in schematic-order, which is the
    // opposite of the bit order
    assign led[1] = {led_pc[0], led_pc[1], led_pc[2], led_pc[3], led_pc[4], led_pc[5], led_pc[6], led_pc[7], led_pc[8], led_pc[9], led_pc[10], led_pc[11]};
    assign led[2] = {led_memaddr[0], led_memaddr[1], led_memaddr[2], led_memaddr[3], led_memaddr[4], led_memaddr[5], led_memaddr[6], led_memaddr[7], led_memaddr[8], led_memaddr[9], led_memaddr[10], led_memaddr[11]};
    assign led[3] = {led_memdata[0], led_memdata[1], led_memdata[2], led_memdata[3], led_memdata[4], led_memdata[5], led_memdata[6], led_memdata[7], led_memdata[8], led_memdata[9], led_memdata[10], led_memdata[11]};
    assign led[4] = {led_acc[0], led_acc[1], led_acc[2], led_acc[3], led_acc[4], led_acc[5], led_acc[6], led_acc[7], led_acc[8], led_acc[9], led_acc[10], led_acc[11]};
    assign led[5] = {led_mq[0], led_mq[1], led_mq[2], led_mq[3], led_mq[4], led_mq[5], led_mq[6], led_mq[7], led_mq[8], led_mq[9], led_mq[10], led_mq[11]};
    assign led[6] = {led_word_count, led_defer, led_execute, led_fetch, led_opr, led_iot, led_jmp, led_jms, led_dca, led_isz, led_tad, led_and};
    assign led[7] = {2'b0, led_step_counter[4], led_step_counter[3], led_step_counter[2], led_step_counter[1], led_step_counter[0], led_run, led_pause, led_ion, led_break, led_current_address};
    assign led[8] = {5'b0, led_link, led_if[0], led_if[1], led_if[2], led_df[0], led_df[1], led_df[2]};

    bit [$clog2(`NUM_PDPS):0]   selected_pdp;
    assign selected_pdp = {switch_df, switch_if};

    bit [11:0] local_led_pc [`NUM_PDPS-1:0];
    bit [11:0] local_led_memaddr [`NUM_PDPS-1:0];
    bit [11:0] local_led_memdata [`NUM_PDPS-1:0];
    bit [11:0] local_led_acc [`NUM_PDPS-1:0];
    bit [11:0] local_led_mq [`NUM_PDPS-1:0];
    bit local_led_and [`NUM_PDPS-1:0];
    bit local_led_tad [`NUM_PDPS-1:0];
    bit local_led_isz [`NUM_PDPS-1:0];
    bit local_led_dca [`NUM_PDPS-1:0];
    bit local_led_jms [`NUM_PDPS-1:0];
    bit local_led_jmp [`NUM_PDPS-1:0];
    bit local_led_iot [`NUM_PDPS-1:0];
    bit local_led_opr [`NUM_PDPS-1:0];
    bit local_led_fetch [`NUM_PDPS-1:0];
    bit local_led_execute [`NUM_PDPS-1:0];
    bit local_led_defer [`NUM_PDPS-1:0];
    bit local_led_word_count [`NUM_PDPS-1:0];
    bit local_led_current_address [`NUM_PDPS-1:0];
    bit local_led_break [`NUM_PDPS-1:0];
    bit local_led_ion [`NUM_PDPS-1:0];
    bit local_led_pause [`NUM_PDPS-1:0];
    bit local_led_run [`NUM_PDPS-1:0];
    bit [4:0] local_led_step_counter [`NUM_PDPS-1:0];
    bit [2:0] local_led_df [`NUM_PDPS-1:0];
    bit [2:0] local_led_if [`NUM_PDPS-1:0];
    bit local_led_link [`NUM_PDPS-1:0];

    generate
        genvar i;
        for (i = 0; i < `NUM_PDPS; ++i) begin : core

            bit         tx_ready;
            bit         tx_valid;
            uart_byte_t tx_data;

            bit         rx_ready;
            bit         rx_valid;
            uart_byte_t rx_data;

            bit             cache_command_ready;
            bit             cache_command_valid;
            core_to_mem_t   cache_command_data;

            bit                 cache_response_ready;
            bit                 cache_response_valid;
            mem_to_core_t       cache_response_data;

`ifdef NO_L1_CACHE
            assign cache_command_ready = pdp_command_ready[i];
            assign pdp_command_valid[i] = cache_command_valid;
            assign pdp_command_data[i] = cache_command_data;

            assign pdp_response_ready[i] = cache_response_ready;
            assign cache_response_valid = pdp_response_valid[i];
            assign cache_response_data = pdp_response_data[i];
`else
            mem_cache cache
                (   .clock(internal_clock)
                ,   .reset(internal_reset || clear_caches)

                ,   .core_command_ready(cache_command_ready)
                ,   .core_command_valid(cache_command_valid)
                ,   .core_command_data(cache_command_data)

                ,   .ram_command_ready(pdp_command_ready[i])
                ,   .ram_command_valid(pdp_command_valid[i])
                ,   .ram_command_data(pdp_command_data[i])

                ,   .ram_response_ready(pdp_response_ready[i])
                ,   .ram_response_valid(pdp_response_valid[i])
                ,   .ram_response_data(pdp_response_data[i])

                ,   .core_response_ready(cache_response_ready)
                ,   .core_response_valid(cache_response_valid)
                ,   .core_response_data(cache_response_data)
                );
`endif

            core cpu
                (   .clk(internal_clock)
                ,   .reset(internal_reset || clear_caches)

                ,   .uart_tx_ready(tx_ready)
                ,   .uart_tx_valid(tx_valid)
                ,   .uart_tx_data(tx_data)

                ,   .uart_rx_ready(rx_ready)
                ,   .uart_rx_valid(rx_valid)
                ,   .uart_rx_data(rx_data)

                ,   .mem_command_ready(cache_command_ready)
                ,   .mem_command_valid(cache_command_valid)
                ,   .mem_command(cache_command_data)

                ,   .mem_read_ready(cache_response_ready)
                ,   .mem_read_valid(cache_response_valid)
                ,   .mem_read(cache_response_data)

                ,   .switch_df(0)
                ,   .switch_if(0)
                ,   .switch_sr(switch_sr)
                ,   .switch_start(selected_pdp == i ? switch_start : 0)
                ,   .switch_load_add(selected_pdp == i ? switch_load_add : 0)
                ,   .switch_dep(selected_pdp == i ? switch_dep : 0)
                ,   .switch_exam(selected_pdp == i ? switch_exam : 0)
                ,   .switch_cont(selected_pdp == i ? switch_cont : 0)
                ,   .switch_stop(selected_pdp == i ? switch_stop : 0)
                ,   .switch_sing_step(selected_pdp == i ? switch_sing_step : 0)
                ,   .switch_sing_inst(selected_pdp == i ? switch_sing_inst : 0)

                ,   .led_pc(local_led_pc[i])
                ,   .led_memaddr(local_led_memaddr[i])
                ,   .led_memdata(local_led_memdata[i])
                ,   .led_acc(local_led_acc[i])
                ,   .led_mq(local_led_mq[i])
                ,   .led_and(local_led_and[i])
                ,   .led_tad(local_led_tad[i])
                ,   .led_isz(local_led_isz[i])
                ,   .led_dca(local_led_dca[i])
                ,   .led_jms(local_led_jms[i])
                ,   .led_jmp(local_led_jmp[i])
                ,   .led_iot(local_led_iot[i])
                ,   .led_opr(local_led_opr[i])
                ,   .led_fetch(local_led_fetch[i])
                ,   .led_execute(local_led_execute[i])
                ,   .led_defer(local_led_defer[i])
                ,   .led_word_count(local_led_word_count[i])
                ,   .led_current_address(local_led_current_address[i])
                ,   .led_break(local_led_break[i])
                ,   .led_ion(local_led_ion[i])
                ,   .led_pause(local_led_pause[i])
                ,   .led_run(local_led_run[i])
                ,   .led_step_counter(local_led_step_counter[i])
                ,   .led_df(local_led_df[i])
                ,   .led_if(local_led_if[i])
                ,   .led_link(local_led_link[i])
                );

            alt_jtag_atlantic
                #(  .INSTANCE_ID(i)
                ,   .LOG2_RXFIFO_DEPTH(10)
                ,   .LOG2_TXFIFO_DEPTH(10)
                ,   .SLD_AUTO_INSTANCE_INDEX("NO")
                ) uart
                (   .clk(internal_clock)
                ,   .rst_n(!internal_reset)

                ,   .r_dat(tx_data)
                ,   .r_val(tx_valid)
                ,   .r_ena(tx_ready)

                ,   .t_dat(rx_data)
                ,   .t_dav(rx_ready)
                ,   .t_ena(rx_valid)
                );

        end

    endgenerate

    assign led_pc = local_led_pc[selected_pdp];
    assign led_memaddr = local_led_memaddr[selected_pdp];
    assign led_memdata = local_led_memdata[selected_pdp];
    assign led_acc = local_led_acc[selected_pdp];
    assign led_mq = local_led_mq[selected_pdp];
    assign led_and = local_led_and[selected_pdp];
    assign led_tad = local_led_tad[selected_pdp];
    assign led_isz = local_led_isz[selected_pdp];
    assign led_dca = local_led_dca[selected_pdp];
    assign led_jms = local_led_jms[selected_pdp];
    assign led_jmp = local_led_jmp[selected_pdp];
    assign led_iot = local_led_iot[selected_pdp];
    assign led_opr = local_led_opr[selected_pdp];
    assign led_fetch = local_led_fetch[selected_pdp];
    assign led_execute = local_led_execute[selected_pdp];
    assign led_defer = local_led_defer[selected_pdp];
    assign led_word_count = local_led_word_count[selected_pdp];
    assign led_current_address = local_led_current_address[selected_pdp];
    assign led_break = local_led_break[selected_pdp];
    assign led_ion = local_led_ion[selected_pdp];
    assign led_pause = local_led_pause[selected_pdp];
    assign led_run = local_led_run[selected_pdp];
    assign led_step_counter = local_led_step_counter[selected_pdp];
    assign led_df = local_led_df[selected_pdp];
    assign led_if = local_led_if[selected_pdp];
    assign led_link = local_led_link[selected_pdp];

endmodule