Implement switches Start and LoadAdd.

3 files changed, 84 insertions, 15 deletions

diff --git a/PLAN b/PLAN
index bdf6256..562c8ab 100644
--- a/PLAN
+++ b/PLAN
@@ -1,15 +1,15 @@
 Turn on blinkenlights from the PDP core
 
 Implement switch features:
-    Start
-    Load_Add
-    Deposit
-    Examine
-    The DF* IF* and SR* data switches
+    Deposit - needs a state machine
+        [pc++] = switch_sr
+    Examine - needs a state machine
+        led_memdata = [pc++]
 
 Don't ignore 6000 and 6001
 
 Add "interrupts enabled" flag
+    switch_start clears this
 6000, 6001, 6002 should properly handle it
     6000 - skip next instruction if interrupts are enabled; disable interrupts (we should probably do this immediately)
     6001 - enable interrupts (after next instruction)
@@ -26,3 +26,9 @@ Sources of interrupts observed:
     TTO ready for output interrupt - this looks like a very likely candidate
     TTI input ready interrupt - this looks like a very likely candidate
         Looks like these happen even when there is no input available - might be caused by the program itself doing something a little funny
+
+Implement IF/DF fields
+    Will need to update behaviour of switch_load_add
+
+Add a macro for reversing polarity of switch_sing_step and switch_sing_inst and
+making switch_dep happen on key lift instead of key press
diff --git a/hdl/core.sv b/hdl/core.sv
index 43a4a1a..14660f5 100644
--- a/hdl/core.sv
+++ b/hdl/core.sv
@@ -7,6 +7,13 @@ module core
     (   input   bit clk
     ,   input   bit reset
 
+    ,   input   bit [2:0] switch_df
+    ,   input   bit [2:0] switch_if
+    ,   input   bit [ADDR_BITS-1:0] switch_sr
+    ,   input   bit switch_start
+    ,   input   bit switch_load_add
+    ,   input   bit switch_dep
+    ,   input   bit switch_exam
     ,   input   bit switch_cont
     ,   input   bit switch_stop
     ,   input   bit switch_sing_step
@@ -43,6 +50,10 @@ module core
     );
 
 bit run;
+bit switch_start_observed;
+bit switch_load_add_observed;
+bit switch_dep_observed;
+bit switch_exam_observed;
 bit switch_cont_observed;
 assign led_run = run;
 
@@ -53,8 +64,8 @@ bit [ADDR_BITS-1:0] mem_address;
 bit [DATA_BITS-1:0] mem_write_data;
 assign led_current_address = mem_valid;
 
-assign led_df = 0;
-assign led_if = 0;
+assign led_df = switch_df; // FIXME actually implement DF and IF
+assign led_if = switch_if;
 assign led_memaddr = mem_address;
 
 bit mem_read_valid;
@@ -151,6 +162,10 @@ assign led_pause = state == MEMWAIT || state == HALT;
 always_ff @(posedge clk) begin
     if (reset) begin
         run = 0;
+        switch_start_observed = 0;
+        switch_load_add_observed = 0;
+        switch_dep_observed = 0;
+        switch_exam_observed = 0;
         switch_cont_observed = 0;
         mem_valid = 0;
         rx_ready = 0;
@@ -163,9 +178,44 @@ always_ff @(posedge clk) begin
         kbd_valid = 0;
         state = state.first;
     end else begin
-        if (switch_cont && !switch_cont_observed) begin
+        if (switch_start && !switch_start_observed) begin
+            switch_start_observed = 1;
             run = 1;
+            mem_valid = 0;
+            acc = 0;
+            link = 1;
+            state = state.first;
+        end
+
+        if (!switch_start)
+            switch_start_observed = 0;
+
+        if (switch_load_add && !switch_load_add_observed) begin
+            switch_load_add_observed = 1;
+            pc = switch_sr;
+            led_pc = pc;
+        end
+
+        if (!switch_load_add)
+            switch_load_add_observed = 0;
+
+        if (switch_dep && !switch_dep_observed) begin
+            switch_dep_observed = 1;
+        end
+
+        if (!switch_dep)
+            switch_dep_observed = 0;
+
+        if (switch_exam && !switch_exam_observed) begin
+            switch_exam_observed = 1;
+        end
+
+        if (!switch_exam)
+            switch_exam_observed = 0;
+
+        if (switch_cont && !switch_cont_observed) begin
             switch_cont_observed = 1;
+            run = 1;
         end
 
         if (!switch_cont)
diff --git a/hdl/top.sv b/hdl/top.sv
index 00225ee..8ed2bc6 100644
--- a/hdl/top.sv
+++ b/hdl/top.sv
@@ -49,9 +49,9 @@ panel fp
     ,   .gpioc(gpioc)
     );
 
-bit [3:1] switch_df;
-bit [3:1] switch_if;
-bit [12:1] switch_sr;
+bit [2:0] switch_df;
+bit [2:0] switch_if;
+bit [11:0] switch_sr;
 bit switch_start;
 bit switch_load_add;
 bit switch_dep;
@@ -61,9 +61,12 @@ bit switch_stop;
 bit switch_sing_step;
 bit switch_sing_inst;
 
-assign switch_df = switch[2][3:1];
-assign switch_if = switch[2][6:4];
-assign switch_sr = switch[1];
+// Note that we are reversing the order here on a number of aggregates because
+// the panel model gives us LEDs and switches in schematic-order, which is the
+// opposite of the bit order
+assign switch_df = {switch[2][1], switch[2][2], switch[2][3]};
+assign switch_if = {switch[2][4], switch[2][5], switch[2][6]};
+assign switch_sr = {switch[1][1], switch[1][2], switch[1][3], switch[1][4], switch[1][5], switch[1][6], switch[1][7], switch[1][8], switch[1][9], switch[1][10], switch[1][11], switch[1][12]};
 assign switch_start = switch[3][1];
 assign switch_load_add = switch[3][2];
 assign switch_dep = switch[3][3];
@@ -100,6 +103,9 @@ bit [2:0] led_df;
 bit [2:0] led_if;
 bit led_link;
 
+// Note that we are reversing the order here on a number of aggregates because
+// the panel model gives us LEDs and switches in schematic-order, which is the
+// opposite of the bit order
 assign led[1] = {led_pc[0], led_pc[1], led_pc[2], led_pc[3], led_pc[4], led_pc[5], led_pc[6], led_pc[7], led_pc[8], led_pc[9], led_pc[10], led_pc[11]};
 assign led[2] = {led_memaddr[0], led_memaddr[1], led_memaddr[2], led_memaddr[3], led_memaddr[4], led_memaddr[5], led_memaddr[6], led_memaddr[7], led_memaddr[8], led_memaddr[9], led_memaddr[10], led_memaddr[11]};
 assign led[3] = {led_memdata[0], led_memdata[1], led_memdata[2], led_memdata[3], led_memdata[4], led_memdata[5], led_memdata[6], led_memdata[7], led_memdata[8], led_memdata[9], led_memdata[10], led_memdata[11]};
@@ -107,12 +113,19 @@ assign led[4] = {led_acc[0], led_acc[1], led_acc[2], led_acc[3], led_acc[4], led
 assign led[5] = {led_mq[0], led_mq[1], led_mq[2], led_mq[3], led_mq[4], led_mq[5], led_mq[6], led_mq[7], led_mq[8], led_mq[9], led_mq[10], led_mq[11]};
 assign led[6] = {led_word_count, led_defer, led_execute, led_fetch, led_opr, led_iot, led_jmp, led_jms, led_dca, led_isz, led_tad, led_and};
 assign led[7] = {2'b0, led_step_counter, led_run, led_pause, led_ion, led_break, led_current_address};
-assign led[8] = {5'b0, led_link, led_if, led_df};
+assign led[8] = {5'b0, led_link, led_if[0], led_if[1], led_if[2], led_df[0], led_df[1], led_df[2]};
 
 core cpu
     (   .clk(clk)
     ,   .reset(reset)
 
+    ,   .switch_df(switch_df)
+    ,   .switch_if(switch_if)
+    ,   .switch_sr(switch_sr)
+    ,   .switch_start(switch_start)
+    ,   .switch_load_add(switch_load_add)
+    ,   .switch_dep(switch_dep)
+    ,   .switch_exam(switch_exam)
     ,   .switch_cont(switch_cont)
     ,   .switch_stop(switch_stop)
     ,   .switch_sing_step(switch_sing_step)