| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Change synthesis of PLL wrapper to avoid latch logic.pre-dp-8 | Julian Blake Kongslie | 2021-04-15 | 1 | -30/+18 |
| * | Use internal PLL for clock and reset generation. | Julian Blake Kongslie | 2021-04-14 | 1 | -0/+140 |
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index : noncpu | |
| Unnamed repository; edit this file 'description' to name the repository. | Julian Blake Kongslie |
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