sim/main.cpp


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#include <cstdint>
#include <iostream>
#include <verilated.h>
#include <verilated_vcd_c.h>

#include "Vtop.h"

std::uint64_t phases = 0;

double sc_time_stamp()
{
    return (double)phases / 2;
}

int main(int argc, const char *argv[])
{
    Verilated::commandArgs(argc, argv);

    Verilated::traceEverOn(true);
    VerilatedVcdC vcd;

    Vtop top;
    top.trace(&vcd, 100 /* levels of hierarchy */);

    vcd.set_time_unit("ns");
    vcd.set_time_resolution("ns");
    vcd.open("build/out.vcd");

    std::cout << "*** RESET SEQUENCE ***\n";

    top.native_clk = 0;
    top.reset_n = 0;
    top.eval();
    vcd.dump(++phases);

    top.native_clk = 1;
    top.eval();
    vcd.dump(++phases);

    top.native_clk = 0;
    top.reset_n = 1;
    top.eval();
    vcd.dump(++phases);

    std::cout << "*** MAIN LOOP ***\n";

    for (unsigned int i = 0; i < 10000 && !Verilated::gotFinish(); ++i) {
        top.native_clk = 1;
        top.eval();
        vcd.dump(++phases);
        top.native_clk = 0;
        top.eval();
        vcd.dump(++phases);
    }

    std::cout << "\n";

    vcd.close();

    return 0;
}