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authorJulian Blake Kongslie2021-07-06 09:44:36 -0700
committerJulian Blake Kongslie2021-07-06 09:44:36 -0700
commit60e1775b874015a3451e4bde10a8eb30701b1165 (patch)
tree477a2835c0f7e616bdeeabe6aee85f8af8b79650 /sim/main.cpp
downloadbreadboarding-60e1775b874015a3451e4bde10a8eb30701b1165.tar.xz
Initial commit.
Diffstat (limited to 'sim/main.cpp')
-rw-r--r--sim/main.cpp61
1 files changed, 61 insertions, 0 deletions
diff --git a/sim/main.cpp b/sim/main.cpp
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1#include <cstdint>
2#include <iostream>
3#include <verilated.h>
4#include <verilated_vcd_c.h>
5
6#include "Vtop.h"
7
8std::uint64_t phases = 0;
9
10double sc_time_stamp()
11{
12 return (double)phases / 2;
13}
14
15int main(int argc, const char *argv[])
16{
17 Verilated::commandArgs(argc, argv);
18
19 Verilated::traceEverOn(true);
20 VerilatedVcdC vcd;
21
22 Vtop top;
23 top.trace(&vcd, 100 /* levels of hierarchy */);
24
25 vcd.set_time_unit("ns");
26 vcd.set_time_resolution("ns");
27 vcd.open("build/out.vcd");
28
29 std::cout << "*** RESET SEQUENCE ***\n";
30
31 top.clk = 0;
32 top.reset = 1;
33 top.eval();
34 vcd.dump(++phases);
35
36 top.clk = 1;
37 top.eval();
38 vcd.dump(++phases);
39
40 top.clk = 0;
41 top.reset = 0;
42 top.eval();
43 vcd.dump(++phases);
44
45 std::cout << "*** MAIN LOOP ***\n";
46
47 for (unsigned int i = 0; i < 10000 && !Verilated::gotFinish(); ++i) {
48 top.clk = 1;
49 top.eval();
50 vcd.dump(++phases);
51 top.clk = 0;
52 top.eval();
53 vcd.dump(++phases);
54 }
55
56 std::cout << "\n";
57
58 vcd.close();
59
60 return 0;
61}